參數資料
| 型號： | ATF16V8B-10PC |
| 廠商： | Atmel |
| 文件頁數： | 2/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLD 8CELL 10NS 20DIP |
| 標準包裝： | 18 |
| 系列： | 16V8 |
| 可編程類型： | EE PLD |
| 宏單元數： | 8 |
| 輸入電壓： | 5V |
| 速度： | 10ns |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 20-PDIP |
| 包裝： | 管件 |
| 產品目錄頁面： | 610 (CN2011-ZH PDF) |
10
0364J–PLD–7/05
ATF16V8B/BQ/BQL
11.1
ATF16V8B Registered Mode
PAL Device Emulation/PAL Replacement. The registered mode is used if one or more regis-
ters are required. Each macrocell can be configured as either a registered or combinatorial
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven
product terms are allocated to the sum term. When the macrocell is configured as an input, the
output enable is permanently disabled.
Any register usage will make the compiler select this mode. The following registered devices
can be emulated using this mode:
16R8
16RP8
16R6
16RP6
16R4
16RP4
Figure 11-1. Registered Configuration for Registered Mode
Notes:
1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the reg-
istered outputs. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
Figure 11-2. Combinatorial Configuration for Registered Mode
Notes:
1. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
相關PDF資料 |
PDF描述 |
|---|---|
| ATF16V8B-10JC | IC PLD 8CELL 10NS 20PLCC |
| ATF16LV8C-10SC | IC PLD EE 15NS 20-SOIC |
| 1-84952-4 | CONN FPC 14POS 1.00MM R/A SMD |
| AMC65DREF-S734 | CONN EDGECARD 130PS .100 EYELET |
| ABC65DRAI-S734 | CONN EDGECARD 130PS .100 R/A PCB |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ATF16V8B-10PI | 功能描述:EEPLD - 電子擦除可編程邏輯設備 10NS 250 GTE EPLD 5V GRN 10NS IND TEMP RoHS:否 制造商:Atmel 邏輯系列:ATF16V8BQL 最大工作頻率:62 MHz 可編程輸入/輸出端數量:20 電源電流:20 mA 延遲時間:15 ns 每個宏指令的積項數:8 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 大電池數量:8 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-20 |
| ATF16V8B-10SC | 功能描述:EEPLD - 電子擦除可編程邏輯設備 10NS250 GATES 20 PIN5V - 10NS RoHS:否 制造商:Atmel 邏輯系列:ATF16V8BQL 最大工作頻率:62 MHz 可編程輸入/輸出端數量:20 電源電流:20 mA 延遲時間:15 ns 每個宏指令的積項數:8 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 大電池數量:8 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-20 |
| ATF16V8B-10SI | 功能描述:EEPLD - 電子擦除可編程邏輯設備 10NS 250 GATES EPLD 10NS IND TEMP RoHS:否 制造商:Atmel 邏輯系列:ATF16V8BQL 最大工作頻率:62 MHz 可編程輸入/輸出端數量:20 電源電流:20 mA 延遲時間:15 ns 每個宏指令的積項數:8 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 大電池數量:8 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-20 |
| ATF16V8B-10XC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Highperformance EE PLD |
| ATF16V8B-10XI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
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