參數(shù)資料
型號(hào): ATF1504BE-5AX44
廠商: Atmel
文件頁(yè)數(shù): 30/30頁(yè)
文件大?。?/td> 0K
描述: IC CPLD 64MC 1.8V 44-TQFP
標(biāo)準(zhǔn)包裝: 160
系列: ATF15xx
可編程類型: 系統(tǒng)內(nèi)可編程(最少 10,000 次編程/擦除循環(huán))
最大延遲時(shí)間 tpd(1): 7.0ns
電壓電源 - 內(nèi)部: 1.7 V ~ 1.9 V
宏單元數(shù): 64
輸入/輸出數(shù): 32
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤(pán)
配用: ATF15XX-DK3-ND - KIT DEV FOR ATF15XX CPLD'S
9
3637B–PLD–1/08
ATF1504BE
2.2
Schmitt Trigger
The Input Buffer of each input and I/O pin has an optional schmitt trigger setting. The schmitt
trigger option can be used to buffer inputs with slow rise times.
2.3
Output Drive Capability
Each output has a high/low drive option. The low drive option (slow slew rate) can be used to
reduce system noise by slowing down outputs that do not need to operate at maximum speed or
drive strength. Outputs default to high drive strength by Atmel software and can be set to low
drive strength through the slew rate option.
2.4
I/O Bank
The I/O pins of the ATF1504BE are grouped into two banks, Bank A and Bank B. Bank A com-
prises of I/O pins for macrocells 1 to 32 (Logic Block A and B), and it is powered by V
CCIOA. Bank
B comprises of I/O pins for macrocells 33 to 64 (Logic Block C and D), and it is powered by
V
CCIOB.
2.5
I/O Standard
The ATF1504BE supports a wide range of I/O standards which include LVTTL, LVCMOS33,
LVCMOS25, LVCMOS18 and LVCMOS15. The I/O pins of the ATF1504BE can also be individ-
ually configured to support SSTL-2 (Class I) and SSTL-3 (Class I) advanced I/O standards.
This and the two I/O banks, together, allow the ATF1504BE to be used for voltage level
translation.
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