- 您現(xiàn)在的位置：買賣IC網 > PDF目錄381525 > ATF1504ASL (Atmel Corp.) High-performance Complex Programmable Logic Device(高性能復雜可編程邏輯器件(CPLD)) PDF資料下載
參數(shù)資料
| 型號： | ATF1504ASL |
| 廠商： | Atmel Corp. |
| 英文描述： | High-performance Complex Programmable Logic Device(高性能復雜可編程邏輯器件(CPLD)) |
| 中文描述： | 高性能的復雜可編程邏輯器件（高性能復雜可編程邏輯器件（CPLD）實現(xiàn)） |
| 文件頁數(shù)： | 1/25頁 |
| 文件大?。?/td> | 604K |
| 代理商： | ATF1504ASL |
1
Features
High-density, High-performance, Electrically-erasable Complex Programmable
Logic Device
– 64 Macrocells
– 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
– 44, 68, 84, 100 Pins
– 7.5 ns Maximum Pin-to-pin Delay
– Registered Operation up to 125 MHz
– Enhanced Routing Resources
In-System Programmability (ISP) via JTAG
Flexible Logic Macrocell
–
D/T/Latch Configurable Flip-flops
–
Global and Individual Register Control Signals
–
Global and Individual Output Enable
–
Programmable Output Slew Rate
–
Programmable Output Open Collector Option
–
Maximum Logic Utilization by Burying a Register with a COM Output
Advanced Power Management Features
–
Automatic 1 mA Standby for
“
L
”
Version
–
Pin-controlled 4 mA Standby Mode
–
Programmable Pin-keeper Circuits on Inputs and I/Os
–
Reduced-power Feature per Macrocell
Available in Commercial and Industrial Temperature Ranges
Available in 44-, 68-, and 84-lead PLCC; 44- and 100-lead TQFP; and 100-lead PQFP
Advanced EE Technology
–
100% Tested
–
Completely Reprogrammable
–
10,000 Program/Erase Cycles
–
20-year Data Retention
–
2000V ESD Protection
–
200 mA Latch-up Immunity
JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
PCI-compliant
3.3V or 5.0V I/O Pins
Security Fuse Feature
Enhanced Features
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
Output Enable Product Terms
Transparent
–
Latch Mode
Combinatorial Output with Registered Feedback within Any Macrocell
Three Global Clock Pins
ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O
Fast Registered Input from Product Term
Programmable
“
Pin-keeper
”
Option
V
CC
Power-up Reset Option
Pull-up Option on JTAG Pins TMS and TDI
Advanced Power Management Features
–
Edge-controlled Power-down
“
L
”
–
Individual Macrocell Power Option
–
Disable ITD on Global Clocks, Inputs and I/O
High-
performance
Complex
Programmable
Logic Device
ATF1504AS
ATF1504ASL
Rev. 0950I
–
01/00
相關PDF資料 |
PDF描述 |
|---|---|
| ATF1508ASL | High-performance EE Programmable Logic Device(高性能復雜可編程邏輯器件) |
| ATF1508ASVL-20QI160 | Highperformance EE PLD |
| ATF1508ASV-15AC100 | Highperformance EE PLD |
| ATF1508ASV-15JC84 | Highperformance EE PLD |
| ATF1508ASV-15JI84 | Highperformance EE PLD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ATF1504ASL-20 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High performance Complex Programmable Logic Device |
| ATF1504ASL-20AC100 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD 64 MACROCELL w/ISP STD PWR 5V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF1504ASL-20AC44 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD 64 MACROCELL w/ISP STD PWR 5V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF1504ASL-20JC44 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD 64 MACROCELL w/ISP STD PWR 5V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF1504ASL-20JC68 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD 64 MACROCELL 5V 20NS COM TEMP RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
發(fā)布緊急采購，3分鐘左右您將得到回復。