參數(shù)資料
型號: ATA5429-PLUW
廠商: ATMEL CORP
元件分類: 通信及網(wǎng)絡
英文描述: UHF ASK/FSK Transceiver
中文描述: SPECIALTY TELECOM CIRCUIT, QCC48
封裝: 7 X 7 MM, ROHS COMPLIANT, QFN-48
文件頁數(shù): 1/97頁
文件大?。?/td> 876K
代理商: ATA5429-PLUW
Features
Multi Channel Half–duplex Transceiver with Approximately ±2.5 MHz Programmable
Tuning Range
High FSK Sensitivity: –106 dBm at 20 kBaud/–109.5 dBm at 2.4 kBaud (433.92 MHz)
High ASK Sensitivity: –112.5 dBm at 10 kBaud/–116.5 dBm at 2.4 kBaud (433.92 MHz)
Low Supply Current: 10.5 mA in RX and TX Mode (3 V/TX with 5 dBm)
Data Rate: 1 to 20 kBaud Manchester FSK, 1 to 10 kBaud Manchester ASK
ASK/FSK Receiver Uses a Low–IF Architecture with High Selectivity, Blocking, and
Low Intermodulation (Typical Blocking 55 dB at ±750 kHz/61 dB at ±1.5 MHz and
70 dB at ±10 MHz, System I1dBCP = –30 dBm/System IIP3 = –20 dBm)
226 kHz IF Frequency with 30 dB Image Rejection and 170 kHz Usable IF Bandwidth
(TBD)
Transmitter Uses Closed Loop Fractional–N Synthesizer for FSK Modulation with a
High PLL Bandwidth and an Excellent Isolation between PLL/VCO and PA
Tolerances of XTAL Compensated by Fractional–N Synthesizer with 800 Hz RF
Resolution
Integrated RX/TX–Switch, Single–ended RF Input and Output
RSSI (Received Signal Strength Indicator)
Communication to Microcontroller with SPI Interface Working at Maximum 500 kBit/s
Configurable Self Polling and RX/TX Protocol Handling with FIFO–RAM Buffering of
Received and Transmitted Data
5 Push Button Inputs and One Wake–up Input are Active in Power–down Mode
Integrated XTAL Capacitors
PA Efficiency: up to 38% (433.92 MHz/10 dBm/3 V)
Low In–band Sensitivity Change of Typically ±1.8 dB within ±58 kHz Center Frequency
Change in the Complete Temperature and Supply Voltage Range (TBD)
Supply Voltage Switch, Supply Voltage Regulator, Reset Generation, Clock/Interrupt
Generation and Low Battery Indicator for Microcontroller
Fully Integrated PLL with Low Phase Noise VCO, PLL Loop Filter and Full Support of
Multi–channel Operation with Arbitrary Channel Distance Due to Fractional–N
Synthesizer
Sophisticated Threshold Control and Quasi–peak Detector Circuit in the Data Slicer
Power Management via Different Operation Modes
315 MHz, 345 MHz, 433.92 MHz, 868.3 MHz and 915 MHz without External VCO and PLL
Components
Inductive Supply with Voltage Regulator if Battery is Empty (AUX Mode)
Efficient XTO Start–up Circuit (> –1.5 k
Worst Case Real Start–up Impedance)
Changing of Modulation Type ASK/FSK and Data Rate without Component Changes
Minimal External Circuitry Requirements for Complete System Solution
Adjustable Output Power: 0 to 10 dBm Adjusted and Stabilized with External Resistor
ESD Protection at all Pins (2 kV HBM, 200 V MM, TBD FCDM)
Supply Voltage Range: 2.4 V to 3.6 V or 4.4 V to 6.6 V
Temperature Range: –40°C to +85°C
Small 7
×
7 mm QFN48 Package
UHF ASK/FSK
Transceiver
ATA5423
ATA5425
ATA5428
ATA5429
Preliminary
Rev. 4841A–RKE–02/05
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