參數(shù)資料
型號(hào): AT91SAM9260B-CU-100
廠商: Atmel
文件頁數(shù): 8/45頁
文件大?。?/td> 0K
描述: IC MCU ARM9 217LFBGA
標(biāo)準(zhǔn)包裝: 126
系列: AT91SAM
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 180MHz
連通性: EBI/EMI,以太網(wǎng),I²C,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 96
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: ROM
RAM 容量: 24K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 217-LFBGA
包裝: 托盤
16
SAM9260 [SUMMARY]
6221LS–ATARM–15-Oct-12
Boot Mode Select
Non-volatile Boot Memory can be internal or external
Selection is made by BMS pin sampled at reset
Remap Command
Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory
Allows Handling of Dynamic Exception Vectors
7.2.1
Matrix Masters
The Bus Matrix of the SAM9260 manages six Masters, which means that each master can perform an access
concurrently with others, according the slave it accesses is available.
Each Master has its own decoder that can be defined specifically for each master. In order to simplify the addressing, all
the masters have the same decodings.
7.2.2
Matrix Slaves
Each Slave has its own arbiter, thus allowing a different arbitration per Slave to be programmed.
7.2.3
Master to Slave Access
All the Masters can normally access all the Slaves. However, some paths do not make sense, such as allowing access
from the Ethernet MAC to the Internal Peripherals. Thus, these paths are forbidden or simply not wired, and shown “-” in
the following table.
Table 7-1.
List of Bus Matrix Masters
Master 0
ARM926 Instruction
Master 1
ARM926 Data
Master 2
PDC
Master 3
USB Host DMA
Master 4
ISI Controller
Master 5
Ethernet MAC
Table 7-2.
List of Bus Matrix Slaves
Slave 0
Internal SRAM0 4 KBytes
Slave 1
Internal SRAM1 4 KBytes
Slave 2
Internal ROM
USB Host User Interface
Slave 3
External Bus Interface
Slave 4
Internal Peripherals
Table 7-3.
SAM9260 Masters to Slaves Access
Master
0 & 1
2345
Slave
ARM926
Instruction &
Data
Peripheral
DMA
Controller
USB Host
Controller
ISI
Controller
Ethernet
MAC
0
Internal SRAM
4 KBytes
X
XXXX
1
Internal SRAM
4 KBytes
X
XXXX
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