參數(shù)資料
型號: AT91SAM7X512-AU
廠商: Atmel
文件頁數(shù): 8/44頁
文件大?。?/td> 0K
描述: MCU ARM 512K HS FLASH 100-LQFP
產(chǎn)品培訓(xùn)模塊: SAM9 MPU Boot Solutions & Application Deployment
AT91SAM7X and SAM7XC Flash-based Microcontrollers
MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 90
系列: SAM7X
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: CAN,以太網(wǎng),I²C,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7X-EK-ND - KIT EVAL FOR AT91SAM7X256/128
16
6120GS–ATARM–07-Apr-11
SAM7X512/256/128 Summary
Embedded Flash Controller
– Embedded Flash interface, up to three programmable wait states
– Prefetch buffer, buffering and anticipating the 16-bit requests, reducing the required
wait states
– Key-protected program, erase and lock/unlock sequencer
– Single command for erasing, programming and locking operations
– Interrupt generation in case of forbidden operation
7.4
Peripheral DMA Controller
Handles data transfer between peripherals and memories
Thirteen channels
– Two for each USART
– Two for the Debug Unit
– Two for the Serial Synchronous Controller
– Two for each Serial Peripheral Interface
– One for the Analog-to-digital Converter
Low bus arbitration overhead
– One Master Clock cycle needed for a transfer from memory to peripheral
– Two Master Clock cycles needed for a transfer from peripheral to memory
Next Pointer management for reducing interrupt latency requirements
Peripheral DMA Controller (PDC) priority is as follows (from the highest priority to the lowest):
Receive
DBGU
Receive
USART0
Receive
USART1
Receive
SSC
Receive
ADC
Receive
SPI0
Receive
SPI1
Transmit
DBGU
Transmit
USART0
Transmit
USART
Transmit
SSC
Transmit
SPI0
Transmit
SPI1
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