參數(shù)資料
型號: AT91SAM7S256C-MU
廠商: Atmel
文件頁數(shù): 137/165頁
文件大?。?/td> 0K
描述: IC ARM7 MCU 32BIT 256K 64QFN
標(biāo)準(zhǔn)包裝: 260
系列: SAM7S
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: I²C,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 托盤
73
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
14. Real-time Timer (RTT)
14.1
Overview
The Real-time Timer is built around a 32-bit counter and used to count elapsed seconds. It generates a periodic
interrupt or/and triggers an alarm on a programmed value.
14.2
Block Diagram
Figure 14-1. Real-time Timer
14.3
Functional Description
The Real-time Timer is used to count elapsed seconds. It is built around a 32-bit counter fed by Slow Clock divided
by a programmable 16-bit value. The value can be programmed in the field RTPRES of the Real-time Mode Regis-
ter (RTT_MR).
Programming RTPRES at 0x00008000 corresponds to feeding the real-time counter with a 1 Hz signal (if the Slow
Clock is 32.768 Hz). The 32-bit counter can count up to 232 seconds, corresponding to more than 136 years, then
roll over to 0.
The Real-time Timer can also be used as a free-running timer with a lower time-base. The best accuracy is
achieved by writing RTPRES to 3. Programming RTPRES to 1 or 2 is possible, but may result in losing status
events because the status register is cleared two Slow Clock cycles after read. Thus if the RTT is configured to trig-
ger an interrupt, the interrupt occurs during 2 Slow Clock cycles after reading RTT_SR. To prevent several
executions of the interrupt handler, the interrupt must be disabled in the interrupt handler and re-enabled when the
status register is clear.
The Real-time Timer value (CRTV) can be read at any time in the register RTT_VR (Real-time Value Register). As
this value can be updated asynchronously from the Master Clock, it is advisable to read this register twice at the
same value to improve accuracy of the returned value.
SLCK
RTPRES
RTTINC
ALMS
16-bit
Divider
32-bit
Counter
ALMV
=
CRTV
RTT_MR
RTT_VR
RTT_AR
RTT_SR
RTTINCIEN
RTT_MR
0
10
ALMIEN
rtt_int
RTT_MR
set
RTT_SR
read
RTT_SR
reset
RTT_MR
reload
rtt_alarm
RTTRST
RTT_MR
RTTRST
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