參數(shù)資料
型號(hào): AT90USB647-AU
廠商: Atmel
文件頁(yè)數(shù): 48/106頁(yè)
文件大?。?/td> 0K
描述: IC AVR MCU 64K 64TQFP
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 450
系列: AVR®
應(yīng)用: USB 微控制器
核心處理器: AVR
程序存儲(chǔ)器類型: 閃存(64 kB)
控制器系列: AT90 USB
RAM 容量: 4K x 8
接口: 2 線串行,SPI 串行,USART,USB
輸入/輸出數(shù): 48
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP,64-VQFP
包裝: 托盤
供應(yīng)商設(shè)備封裝: 64-TQFP
配用: ATSTK600-RC17-ND - STK600 ROUTING CARD AVR
ATSTK525-ND - KIT STARTER FOR AT90USB
AT90USBKEY2-ND - KIT DEMO FOR AT90USB
其它名稱: AT90USB647-16AU
AT90USB647-16AU-ND
46
7593L–AVR–09/12
AT90USB64/128
be calibrated to any frequency in the range 7.3 - 8.1MHz within ±10% accuracy. Calibration out-
side that range is not guaranteed.
Note that this oscillator is used to time EEPROM and Flash write accesses, and these write
times will be affected accordingly. If the EEPROM or Flash are written, do not calibrate to more
than 8.8MHz. Otherwise, the EEPROM or Flash write may fail.
The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the
lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-
quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher
frequency than OSCCAL = 0x80.
The CAL6..0 bits are used to tune the frequency within the selected range. A setting of 0x00
gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in the
range. Incrementing CAL6..0 by 1 will give a frequency increment of less than 2% in the fre-
quency range 7.3 - 8.1MHz.
7.6
External clock
The device can utilize a external clock source as shown in Figure 7-3. To run the device on an
external clock, the CKSEL fuses must be programmed as shown in Table 7-1 on page 41.
Figure 7-3.
External clock drive configuration.
When this clock source is selected, start-up times are determined by the SUT fuses as shown in
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Table 7-9.
Start-up times for the external clock selection.
Power conditions
Start-up time from power-
down and power-save
Additional delay from
reset (VCC = 5.0V)
SUT1..0
BOD enabled
6CK
14CK
00
Fast rising power
6CK
14CK + 4.1ms
01
Slowly rising power
6CK
14CK + 65ms
10
Reserved
11
NC
EXTERNAL
CLOCK
SIGNAL
XTAL2
XTAL1
GND
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