參數(shù)資料
    

    


    


    
型號(hào)：
AT90USB1286-MUR

    

    
廠商：
Atmel

    

    
文件頁(yè)數(shù)：
50/106頁(yè)

    

    
文件大?。?/td>
0K

    

    
描述：
MCU AVR 128K FLASH 16MHZ 64QFN

    

    
產(chǎn)品培訓(xùn)模塊：
MCU Product Line Introduction
    
	megaAVR Introduction
    		

    

    
標(biāo)準(zhǔn)包裝：
4,000

    

    
系列：
AVR® 90USB

    

    
核心處理器：
AVR
    		

    

    
芯體尺寸：
8-位
    		

    

    
速度：
16MHz
    		

    

    
連通性：
EBI/EMI，I²C，SPI，UART/USART，USB，USB OTG
    		

    

    
外圍設(shè)備：
欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
    		

    

    
輸入/輸出數(shù)：
48
    		

    

    
程序存儲(chǔ)器容量：
128KB（128K x 8）
    		

    

    
程序存儲(chǔ)器類型：
閃存
    		

    

    
EEPROM 大?。?/td>
4K x 8
    		

    

    
RAM 容量：
8K x 8
    		

    

    
電壓 - 電源 (Vcc/Vdd)：
2.7 V ~ 5.5 V
    		

    

    
數(shù)據(jù)轉(zhuǎn)換器：
A/D 8x10b
    		

    

    
振蕩器型：
內(nèi)部
    		

    

    
工作溫度：
-40°C ~ 85°C
    		

    

    
封裝/外殼：
64-VFQFN 裸露焊盤(pán)
    		

    

    
包裝：
帶卷 (TR)
    		

    

    
其它名稱：
AT90USB1286-MUR-ND
    AT90USB1286-MURTR
    		

    

    

    

	
    
    
    

    
    
	
    48
    7593L–AVR–09/12
    AT90USB64/128
    7.9.1
    CLKPR – Clock Prescale Register
     Bit 7 – CLKPCE: Clock Prescaler Change Enable
    The CLKPCE bit must be written to logic one to enable change of the CLKPS bits. The CLKPCE
    bit is only updated when the other bits in CLKPR are simultaneously written to zero. CLKPCE is
    cleared by hardware four cycles after it is written or when CLKPS bits are written. Rewriting the
    CLKPCE bit within this timeout period does neither extend the timeout period, nor clear the CLK-
    PCE bit.
     Bits 3..0 – CLKPS3..0: Clock Prescaler Select Bits 3 - 0
    These bits define the division factor between the selected clock source and the internal system
    clock. These bits can be written run-time to vary the clock frequency to suit the application
    requirements. As the divider divides the master clock input to the MCU, the speed of all synchro-
    nous peripherals is reduced when a division factor is used. The division factors are given in
    The CKDIV8 Fuse determines the initial value of the CLKPS bits. If CKDIV8 is unprogrammed,
    the CLKPS bits will be reset to “0000”. If CKDIV8 is programmed, CLKPS bits are reset to
    “0011”, giving a division factor of 8 at start up. This feature should be used if the selected clock
    source has a higher frequency than the maximum frequency of the device at the present operat-
    ing conditions. Note that any value can be written to the CLKPS bits regardless of the CKDIV8
    Fuse setting. The Application software must ensure that a sufficient division factor is chosen if
    the selected clock source has a higher frequency than the maximum frequency of the device at
    the present operating conditions. The device is shipped with the CKDIV8 fuse programmed.
    Table 7-10.
    Clock prescaler select.
    Bit
    7
    6
    543
    2
    1
    0
    CLKPCE
    –
    CLKPS3
    CLKPS2
    CLKPS1
    CLKPS0
    CLKPR
    Read/write
    R/W
    R
    R/W
    Initial value
    0
    See bit description
    CLKPS3
    CLKPS2
    CLKPS1
    CLKPS0
    Clock division factor
    00
    1
    00
    01
    2
    00
    10
    4
    00
    11
    8
    01
    00
    16
    01
    32
    01
    10
    64
    01
    11
    128
    10
    00
    256
    10
    01
    Reserved
    10
    Reserved
    10
    11
    Reserved
    11
    00
    Reserved
    
    
    
    
    
    


    


    

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AT90USB1287
 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Microcontroller with 64/128K Bytes of ISP Flash and USB Controller

    

    
AT90USB1287-16AU
功能描述:8位微控制器 -MCU 128kB Flash 4kB EEPROM 48 I/O Pins RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT

    

    
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AT90USB1287-16MU
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