參數(shù)資料
| 型號： | AT90LS2343-1PC |
| 廠商： | Atmel |
| 文件頁數(shù)： | 46/63頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 2K FLASH 1MHZ COM 8-DIP |
| 標準包裝： | 50 |
| 系列： | AVR® 90LS |
| 核心處理器： | AVR |
| 芯體尺寸： | 8-位 |
| 速度： | 1MHz |
| 連通性： | SPI |
| 外圍設備： | 欠壓檢測/復位，POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 2KB（1K x 16） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 128 x 8 |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 6 V |
| 振蕩器型： | 內部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
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2002 Microchip Technology Inc.
Preliminary
DS41139B-page 49
PIC16C433
8.5
A/D Operation During SLEEP
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS<1:0> = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared,
and the result loaded into the ADRES Register. If the A/
D interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
8.6
A/D Accuracy/Error
The overall accuracy of the A/D is less than
± 1 LSb for
VDD = 5V
± 10% and the analog VREF = VDD. This over-
all accuracy includes offset error, full scale error and
integral error. The A/D converter is monotonic over the
full VDD range. The resolution and accuracy may be
less when either the analog reference (VDD) is less
than 5.0V, or when the analog reference (VREF) is less
than VDD.
The maximum pin leakage current is specified in the
Device Data Sheet electrical specification, parameter
#D060.
In systems where the device frequency is low, use of
the A/D RC clock is preferred. At moderate to high fre-
quencies, TAD should be derived from the device oscil-
lator. TAD must not violate the minimum and should be
≤ 8 s for preferred operation. This is because TAD,
when derived from TOSC, is kept away from on-chip
phase clock transitions. This reduces, to a large extent,
the effects of digital switching noise. This is not possi-
ble with the RC derived clock. The loss of accuracy due
to digital switching noise can be significant if many I/O
pins are active.
In systems where the device will enter SLEEP mode
after the start of the A/D conversion, the RC clock
source selection is required. In this mode, the digital
noise from the modules in SLEEP is stopped. This
method gives high accuracy.
8.7
Effects of a RESET
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off, and
any conversion is aborted. The value that is in the
ADRES register is not modified for a RESET. The
ADRES register will contain unknown data after a
Power-on Reset.
8.8
Connection Considerations
If the input voltage exceeds the rail values (VSS or VDD)
by greater than 0.2V, then the accuracy of the conver-
sion is out of specification.
An external RC filter is sometimes added for anti-
aliasing of the input signal. The R component should be
selected to ensure that the total source impedance is
kept under the 10 k
recommended specification. Any
external components connected (via hi-impedance) to
an analog input pin (capacitor, zener diode, etc.) should
have very little leakage current at the pin.
8.9
Transfer Function
The ideal transfer function of the A/D converter is as
follows: the first transition occurs when the analog input
FIGURE 8-3:
A/D TRANSFER FUNCTION
Note:
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS<1:0> = 11). To perform an A/D
conversion in SLEEP, the GO/DONE bit
must be set, followed by the SLEEP
instruction.
Note:
For the PIC16C433, care must be taken
when using the GP4 pin in A/D conver-
sions due to its proximity to the OSC1 pin.
Digit
a
lCode
Output
FFh
FEh
04h
03h
02h
01h
00h
0.5
LSb 1LSb 2LSb 3LSb 4LSb
255
LSb
256
LSb
(full
scale)
Analog Input Voltage
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| AT90LS2343-1PI | 功能描述:IC MCU 2K FLASH 1MHZ IND 8-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:AVR® 90LS 標準包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設備:POR，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（32K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉換器:- 振蕩器型:內部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| AT90LS2343-1SC | 功能描述:IC MCU 2K FLASH 1MHZ COM 8-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:AVR® 90LS 標準包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設備:POR，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（32K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉換器:- 振蕩器型:內部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| AT90LS2343-1SI | 功能描述:8位微控制器 -MCU 2k bit RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| AT90LS2343-4PC | 功能描述:8位微控制器 -MCU 2k bit RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| AT90LS2343-4PI | 功能描述:8位微控制器 -MCU 2k bit RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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