參數(shù)資料
型號(hào): AT89S52-24PC
廠商: Atmel
文件頁數(shù): 13/37頁
文件大?。?/td> 0K
描述: IC MCU 8K FLASH 24MHZ 40-DIP
標(biāo)準(zhǔn)包裝: 9
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設(shè)備: WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
20
1919D–MICRO–6/08
AT89S52
Figure 16-2. External Clock Drive Configuration
17. Program Memory Lock Bits
The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)
to obtain the additional features listed in Table 17-1.
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random value and holds that
value until reset is activated. The latched value of EA must agree with the current logic level at
that pin in order for the device to function properly.
Table 16-1.
Status of External Pins During Idle and Power-down Modes
Mode
Program
Memory
ALE
PSEN
PORT0
PORT1
PORT2
PORT3
Idle
Internal
1
Data
Idle
External
1
Float
Data
Address
Data
Power-down
Internal
0
Data
Power-down
External
0
Float
Data
XTAL2
XTAL1
GND
NC
EXTERNAL
OSCILLATOR
SIGNAL
Table 17-1.
Lock Bit Protection Modes
Program Lock Bits
LB1
LB2
LB3
Protection Type
1
U
No program lock features
2P
U
MOVC instructions executed from external program memory
are disabled from fetching code bytes from internal memory, EA
is sampled and latched on reset, and further programming of
the Flash memory is disabled
3
P
U
Same as mode 2, but verify is also disabled
4
P
Same as mode 3, but external execution is also disabled
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