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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | AT89C51RC2-3CSIM |
| 寤犲晢锛� | Atmel |
| 鏂囦欢闋佹暩(sh霉)锛� | 12/127闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC 8051 MCU FLASH 32K 40DIP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 9 |
| 绯诲垪锛� | 89C |
| 鏍稿績铏曠悊鍣細 | 8051 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 60MHz |
| 閫ｉ€氭€э細 | SPI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | POR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 32 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 32KB锛�32K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 1.25K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.7 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 40-DIP锛�0.600"锛�15.24mm锛� |
| 鍖呰锛� | 绠′欢 |
| 閰嶇敤锛� | AT89STK-11-ND - KIT STARTER FOR AT89C51RX2 |
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109
AT89C51RB2/RC2
4180E鈥�8051鈥�10/06
DC Parameters for Low
Voltage
TA = 0
掳C to +70掳C; V
SS = 0V; VCC = 2.7V to 3.6V; F = 0to 40 MHz
TA = -40
掳C to +85掳C; V
SS = 0V; VCC = 2.7V to 3.6V; F = 0 to 40 MHz
Notes:
1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 49.), VIL =
VSS + 0.5V,
VIH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see Figure
46).
2. Idle I
CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC -
3. Power Down ICC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see Fig-
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1
and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed
0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.
5. Typical are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and
5V.
6. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum I
OL per port pin: 10 mA
Maximum I
OL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total IOL for all output pins: 71 mA
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIL
Input Low Voltage
-0.5
0.2 VCC - 0.1
V
VIH
Input High Voltage except RST, XTAL1
0.2 VCC + 0.9
VCC + 0.5
V
VIH1
Input High Voltage, RST, XTAL1
0.7 VCC
VCC + 0.5
V
VOL
Output Low Voltage, ports 1, 2, 3, 4(6)
0.45
V
IOL = 0.8 mA
(4)
VOL1
Output Low Voltage, port 0, ALE, PSEN (6)
0.45
V
IOL = 1.6 mA
(4)
VOH
Output High Voltage, ports 1, 2, 3, 4
0.9 VCC
VIOH = -10 渭A
VOH1
Output High Voltage, port 0, ALE, PSEN
0.9 VCC
VIOH = -40 渭A
IIL
Logical 0 Input Current ports 1, 2, 3, 4
-50
渭AV
IN = 0.45 V
ILI
Input Leakage Current for P0 only
卤10
渭A
0.45V < VIN < VCC
ITL
Logical 1 to 0 Transition Current, ports 1, 2, 3,
-650
渭AV
IN = 2.0V
RRST
RST Pulldown Resistor
50
200 (5)
250
k
惟
CIO
Capacitance of I/O Buffer
10
pF
Fc = 3 MHz
TA = 25
掳C
I
PD
Power Down Current
10 (5)
50
渭A
VCC = 2.7V to
3.6V(3)
I
CCOP
Power Supply Current on normal mode
0.4 x Frequency (MHz) + 5
mA
V
CC = 3.6 V
(1)
I
CCIDLE
Power Supply Current on idle mode
0.3 x Frequency (MHz) + 5
mA
V
CC = 3.6 V
(2)
ICCProg
Power Supply Current during flash Write / Erase
0.4 x
Frequency
(MHz) +
20
mA
VCC = 5.5V
(8)
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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| AT89C51RC2-3CSUM | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32kB Flash 1280B RAM 2.7V-5.5V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| AT89C51RC-24AC | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32K FLASH 4.0 TO 5.5V - 24MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| AT89C51RC-24AI | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32K FLASH 4.0 TO 5.5V - 24MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| AT89C51RC-24AU | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32K FLASH 4.0 TO 5.5V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| AT89C51RC-24JC | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32K FLASH 4.0 TO 5.5V - 24MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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