參數(shù)資料
型號: AT89C51RC-24PU
廠商: Atmel
文件頁數(shù): 2/36頁
文件大?。?/td> 0K
描述: IC MCU 32K FLASH 24MHZ 40-DIP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 10
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: SPI,UART/USART
外圍設(shè)備: WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
10
1920D–MICRO–6/08
AT89C51RC
6.
Memory Organization
The MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K
bytes each of external Program and Data Memory can be addressed.
7.
Program Memory
If the EA pin is connected to GND, all program fetches are directed to external memory.
On the AT89C51RC, if EA is connected to V
CC, program fetches to addresses 0000H through
7FFFH are directed to internal memory and fetches to addresses 8000H through FFFFH are to
external memory.
7.1
Data Memory
The AT89C51RC has internal data memory that is mapped into four separate segments: the
lower 128 bytes of RAM, upper 128 bytes of RAM, 128 bytes special function register (SFR) and
256 bytes expanded RAM (ERAM).
The four segments are:
1.
The Lower 128 bytes of RAM (addresses 00H to 7FH) are directly and indirectly
addressable.
2.
The Upper 128 bytes of RAM (addresses 80H to FFH) are indirectly addressable only.
3.
The Special Function Registers, SFRs, (addresses 80H to FFH) are directly address-
able only.
4.
The 256-byte expanded RAM (ERAM, 00H-FFH) is indirectly accessed by MOVX
instructions, and with the EXTRAM bit cleared.
The Lower 128 bytes can be accessed by either direct or indirect addressing. The Upper 128
bytes can be accessed by indirect addressing only. The Upper 128 bytes occupy the same
address space as the SFR. This means they have the same address, but are physically sepa-
rate from the SFR space.
When an instruction accesses an internal location above address 7FH, the CPU knows whether
the access is to the upper 128 bytes of data RAM or to SFR space by the addressing mode used
in the instruction. Instructions that use direct addressing access SFR space. For example:
MOV 0A0H, # data
accesses the SFR at location 0S0H (which is P2). Instructions that use indirect addressing
access the Upper 128 bytes of data RAM. For example:
MOV@R0, # data
where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose
address is 0A0H).
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data
RAM are available as stack space.
The 256 bytes of ERAM can be accessed by indirect addressing, with EXTRAM bit cleared and
MOVX instructions. This part of memory is physically located on-chip, logically occupying the
first 256 bytes of external data memory.
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