參數(shù)資料
型號： AT89C51CC02CA-SISUM
廠商： Atmel
文件頁數(shù)： 154/159頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 16K 28PLCC
產(chǎn)品培訓模塊： MCU Product Line Introduction
標準包裝： 888
系列： AT89C CAN
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： CAN，UART/USART
外圍設備： POR，PWM，WDT
輸入/輸出數(shù)： 20
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 8x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-LCC（J 形引線）
包裝： 管件
94
AT/T89C51CC02
4126L–CAN–01/08
Registers
Table 56. CANGCON Register
CANGCON (S:ABh)
CAN General Control Register
Reset Value = 0000 0000b
7654
3
2
10
ABRQ
OVRQ
TTC
SYNCTTC
AUTOBAUD
TEST
ENA
GRES
Bit Number
Bit Mnemonic
Description
7ABRQ
Abort Request
Not an auto-resetable bit. A reset of the ENCH bit (message object
control & DLC register) is done for each message object. The
pending transmission communications are immediately aborted but
the on-going communication will be terminated normally, setting
the appropriate status flags, TxOk or RxOk.
6OVRQ
Overload Frame Request (Initiator).
Auto-resetable bit.
Set to send an overload frame after the next received message.
Cleared by the hardware at the beginning of transmission of the
overload frame.
5TTC
Network in Timer Trigger Communication
set to select node in TTC.
clear to disable TTC features.
4
SYNCTTC
Synchronization of TTC
When this bit is set the TTC timer is caught on the last bit of the
End Of Frame.
When this bit is clear the TTC timer is caught on the Start Of
Frame.
This bit is only used in the TTC mode.
3AUTOBAUD
AUTOBAUD
set to active listening mode.
Clear to disable listening mode
2TEST
Test mode. The test mode is intended for factory testing and not for
customer use.
1ENA/STB
Enable/Standby CAN Controller
When this bit is set, it enables the CAN controller and its input
clock.
When this bit is clear, the on-going communication is terminated
normally and the CAN controller state of the machine is frozen (the
ENCH bit of each message object does not change).
In the standby mode, the transmitter constantly provides a
recessive level; the receiver is not activated and the input clock is
stopped in the CAN controller. During the disable mode, the
registers and the mailbox remain accessible.
Note that two clock periods are needed to start the CAN controller
state of the machine.
0GRES
General Reset (Software Reset).
Auto-resetable bit. This reset command is ‘ORed’ with the
hardware reset in order to reset the controller. After a reset, the
controller is disabled.
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相關代理商/技術參數(shù)
參數(shù)描述
AT89C51CC02CA-TDSUM 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Enhanced 8-bit Microcontroller with CAN Controller and Flash
AT89C51CC02CA-TISUM 功能描述:8位微控制器 -MCU CTRL Bootloader CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89C51CC02CA-TUSUM 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89C51CC02UA-RATUM 功能描述:8位微控制器 -MCU LPC/CAN/C51 BootUA IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89C51CC02UA-SISUM 功能描述:8位微控制器 -MCU CTRL Bootloader UART RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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