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參數資料
| 型號： | AT88SC150 |
| 英文描述： | ASIC |
| 中文描述： | 專用集成電路 |
| 文件頁數： | 5/13頁 |
| 文件大?。?/td> | 141K |
| 代理商： | AT88SC150 |
5
AT88SC0104C
2021BS–SMEM–10/02
Protocol Selection
The AT88SC0104C is compatible with two different communication protocols: asynchro-
nous T = 0 as defined by ISO 7816-3 or synchronous two-wire protocol. The power-up
sequence determines which of the two protocols will be used.
Asynchronous
T = 0 Protocol
The power-up sequence complies with ISO 7816-3 for a cold reset.
V
CC
goes high; RST, I/O-SDA and CLK-SCL are low.
Set I/O-SDA in receive mode.
Provide a clock signal to CLK-SCL.
RST goes high after 400 clock cycles.
The device will respond with a 64-bit ATR code, including historical bytes to indicate the
memory density within the CryptoMemory family. Once the asynchronous mode has
been selected, it is not possible to switch to the synchronous mode without powering off
the device.
Figure 2.
Asynchronous T = 0 Protocol
Synchronous
Two-wire Protocol
The synchronous mode is the default after powering up V
CC
due to the internal pull-up
on RST.
Power-up V
CC
, RST goes high also.
After stable V
CC
, CLK-SCL and I/O-SDA may be driven.
Figure 3.
Synchronous Two-wire Protocol
Note:
Four clock pulses must be sent before the first command is issued.
Vcc
I/O-SDA
RST
CLK-SCL
ATR
Vcc
I/O-SDA
RST
CLK-SCL
1
2
3
4
相關PDF資料 |
PDF描述 |
|---|---|
| AT88SC153-09AT-XX | I2C Serial EEPROM |
| AT88SC153-09AT-XX-2.7 | I2C Serial EEPROM |
| AT88SC153-09BT-XX | I2C Serial EEPROM |
| AT88SC153-09BT-XX-2.7 | I2C Serial EEPROM |
| AT88SC153-09CT-XX | I2C Serial EEPROM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AT88SC153 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:3 x 64 x 8 Secure Memory with Authentication |
| AT88SC153-09AT-XX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| AT88SC153-09AT-XX-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| AT88SC153-09BT-XX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| AT88SC153-09BT-XX-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
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