參數(shù)資料
型號(hào)： AT6000(LV)
廠商： Atmel Corp.
英文描述： AT6000(LV) Series [Updated 10/99. 28 Pages] AT6K FPGA ideal for use as re-configurable DSP Co-processors
中文描述： AT6000（低壓）系列[更新10/99。 28頁] AT6K FPGA的再利用，作為理想的配置DSP協(xié)處理器
文件頁數(shù)： 1/28頁
文件大?。?/td> 835K
代理商： AT6000(LV)
1
Features
High-performance
– System Speeds > 100 MHz
– Flip-flop Toggle Rates > 250 MHz
– 1.2 ns/1.5 ns Input Delay
– 3.0 ns/6.0 ns Output Delay
Up to 204 User I/Os
Thousands of Registers
Cache Logic
Design
–
Complete/Partial In-System Reconfiguration
–
No Loss of Data or Machine State
–
Adaptive Hardware
Low Voltage and Standard Voltage Operation
–
5.0 (V
CC
= 4.75V to 5.25V)
–
3.3 (V
CC
= 3.0V to 3.6V)
Automatic Component Generators
–
Reusable Custom Hard Macro Functions
Very Low-power Consumption
–
Standby Current of 500 μA/ 200 μA
–
Typical Operating Current of 15 to 170 mA
Programmable Clock Options
–
Independently Controlled Column Clocks
–
Independently Controlled Column Resets
–
Clock Skew Less Than 1 ns Across Chip
Independently Configurable I/O (PCI Compatible)
–
TTL/CMOS Input Thresholds
–
Open Collector/Tristate Outputs
–
Programmable Slew-rate Control
–
I/O Drive of 16 mA (combinable to 64 mA)
Easy Migration to Atmel Gate Arrays for High Volume Production
Description
AT6000 Series SRAM-based Field Programmable Gate Arrays (FPGAs) are ideal for
use as reconfigurable coprocessors and implementing compute-intensive logic.
Supporting system speeds greater than 100 MHz and using a typical operating current
of 15 to 170 mA, AT6000 Series devices are ideal for high-speed, compute-intensive
designs. These FPGAs are designed to implement Cache Logic
, which provides the
user with the ability to implement adaptive hardware and perform hardware
acceleration.
The patented AT6000 Series architecture employs a symmetrical grid of small yet
powerful cells connected to a flexible busing network. Independently controlled clocks
and resets govern every column of cells. The array is surrounded by programmable
I/O.
AT6000 Series Field Programmable Gate Arrays
Device
AT6002
AT6003
AT6005
AT6010
Usable Gates
6,000
9,000
15,000
30,000
Cells
1,024
1,600
3,136
6,400
Registers (maximum)
1,024
1,600
3,136
6,400
I/O (maximum)
96
120
108
204
Typ. Operating Current (mA)
15 - 30
25 - 45
40 - 80
85 - 170
Cell Rows x Columns
32 x 32
40 x 40
56 x 56
80 x 80
Rev. 0264F
–
10/99
Coprocessor
Field
Programmable
Gate Arrays
AT6000(LV)
Series
(continued)
相關(guān)PDF資料
PDF描述
AT6002 SRAM-based Coprocessor Field Programmable Gate Arrays（FPGA）(基于靜態(tài)RAM協(xié)處理器場(chǎng)可編程門陣列)
AT6003 SRAM-based Coprocessor Field Programmable Gate Arrays（FPGA）(基于靜態(tài)RAM協(xié)處理器場(chǎng)可編程門陣列)
AT6005 SRAM-based Coprocessor Field Programmable Gate Arrays（FPGA）(基于靜態(tài)RAM協(xié)處理器場(chǎng)可編程門陣列)
AT6005A-2AC Coprocessor Field Programmable Gate Arrays
AT6010A-2AC Product Description:DC-Coupled 3dB 50? Attenuator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT6000LVSERIES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Coprocessor Field Programmable Gate Arrays
AT6000SERIES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Coprocessor Field Programmable Gate Arrays
AT6002 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Coprocessor Field Programmable Gate Arrays
AT6002-2AC 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 6K GATE 2NS RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
AT6002-2AI 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 6K GATE 2NS IND TEMP RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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