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| 型號： | AT30TS00-MAH-T |
| 廠商： | Atmel |
| 文件頁數(shù)： | 9/28頁 |
| 文件大小： | 362K |
| 描述： | SENSOR DGTL TEMP I2C/SMBUS 8WDFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器），DIMM DDR 內(nèi)存 |
| 傳感器類型： | 內(nèi)部 |
| 感應(yīng)溫度： | -20°C ~ 125°C |
| 精確度： | ±3°C |
| 拓?fù)洌?/td> | ADC，寄存器庫 |
| 輸出類型： | 2 線串行，I²C?/SMBUS? |
| 輸出警報(bào)： | 是 |
| 輸出風(fēng)扇： | 無 |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 工作溫度： | -20°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-WDFN |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AT30TS00-MAH-TDKR |
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Two-wire Digital Temperature Sensor
9
8585BSEEPR8/10
4. Device Addressing
The Atmel
?/DIV>
AT30TS00 device requires an 8-bit device address word following a start condition to enable the chip
to access either the Temperature Sensor functions (See Table 4-1).
Table 4-1. Control/Device Address Word
Device
Control / Device Address Word
Device ID
Device Address Bits
R/W
B7
B6
B5
B4
A2
A1
A0
B0
Temperature Sensor
0
0
1
1
X
X
X
X
Note: X = User Selectable
The device address word consists of a mandatory 0011 sequence for the first four most significant bits for
Temperature Sensor operations. The next three bits are the A2, A1 and A0 device address bits for the AT30TS00
device. These three bits must match their corresponding hard-wired input pins. The eighth bit of the device
address is the read/write operation select bit. A read operation is initiated if this bit is high. Upon a compare of the
device address, the device will output a zero, called an Acknowledge (ACK). If a compare is not made, the chip
will not ACK and will return to a standby state.
5. Temperature Sensor Functional Description
The AT30TS00 consists of a Delta-Sigma Analog to Digital Converter (ADC) with a band gap type temperature
sensor that monitors and updates its own temperature reading at least 8 times per second converting the
readings into digital data bits and latching them into a temperature register that can be read via 2-wire I
2
C/SMBus
serial interface. The device communicates over a 2-wire I
2
C/SMBus interface with the bus master or controller
consisting of a serial clock (SCL) and serial bidirectional data bus (SDA) with clock frequencies up to 400Khz. The
bus master or controller generates the SCL signal and is used by the AT30TS00 to receive and send serial data
on the SDA line with the most significant bit transferred first. A pull-up resistor is required on the SDA pin since it
is in an open drain configuration.
5.1.
VENT
Output
The
VENT
pin has three operating modes depending on configuration settings. They are Interrupt, Comparator,
and Critical Alarm (Crit_Alarm) modes.
In the Interrupt mode, once a temperature reaches a boundary limit, the AT30TS00 asserts the VENT
pin. The
VENT
pin will remain asserted until software clears the interrupt by writing a 1 to the EVTCLR bit five in the
configuration register. When the temperature drops below specified limits, the device returns back to either
interrupt or comparator mode as programmed in the configuration registers EVTMOD bit 0.
In the comparator mode, the VENT
pin remains asserted until the error condition that caused the pin to be
asserted no longer exists and the VENT
pin will clear itself. In the Crit_Alarm mode, when the measured
temperature exceeds Crit_Alarm trip limit, the VENT
pin will remain asserted until the temperature drops below
Crit_Alarm limit minus hysteresis (See Figure 6-1). All event thresholds use hysteresis as programmed in the
configuration register.
5.2. Alarm Window
The alarm window consists of the Upper Alarm Trip Register and Lower Alarm Trip Register. The Upper Alarm
Trip Register holds the upper temperature trip point and the Lower Alarm Trip Register holds the lower
temperature trip point. After the VENT
pin control is enabled, the VENT
output will be triggered upon entering and
exiting from this window.
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