參數(shù)資料
型號(hào): AT28C256-W
廠商: ATMEL CORP
元件分類: DRAM
英文描述: Octal Buffer/Driver With 3-State Outputs 20-TSSOP -40 to 85
中文描述: 32K X 8 EEPROM 5V, 250 ns, UUC30
封裝: DIE
文件頁(yè)數(shù): 1/14頁(yè)
文件大?。?/td> 762K
代理商: AT28C256-W
AT28C256
256K (32K x 8)
Paged
CMOS
E
2
PROM
Features
Fast Read Access Time - 150 ns
Automatic Page Write Operation
Internal Address and Data Latches for 64-Bytes
Internal Control Timer
Fast Write Cycle Times
Page Write Cycle Time: 3 ms or 10 ms Maximum
1 to 64-Byte Page Write Operation
Low Power Dissipation
50 mA Active Current
200
μ
A CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Endurance: 10
4
or 10
5
Cycles
Data Retention: 10 Years
Single 5V
±
10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-Wide Pinout
Full Military, Commercial, and Industrial Temperature Ranges
Description
The AT28C256 is a high-performance Electrically Erasable and Programmable Read
Only Memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmel’s advanced nonvolatile CMOS technology, the device offers access
times to 150 ns with power dissipation of just 440 mW. When the device is deselected,
the CMOS standby current is less than 200
μ
A.
(continued)
LCC, PLCC
Top View
Pin Name
Function
A0 - A14
Addresses
CE
Chip Enable
OE
Output Enable
WE
Write Enable
I/O0 - I/O7
Data Inputs/Outputs
NC
No Connect
DC
Don’t Connect
Pin Configurations
TSOP
Top View
PGA
Top View
Note: PLCC package pins 1 and
17 are DON’T CONNECT.
CERDIP, PDIP,
FLATPACK, SOIC
Top View
0006F
AT28C256
2-217
相關(guān)PDF資料
PDF描述
AT28C256E Octal Buffer/Driver With 3-State Outputs 20-TSSOP -40 to 85
AT28C256E-15JC Octal Buffer/Driver With 3-State Outputs 20-TSSOP -40 to 85
AT28C256E-15JI Octal Buffer/Driver With 3-State Outputs 20-TSSOP -40 to 85
AT28C256F-15TI 64K 8K x 8 Battery-Voltage CMOS E2PROM
AT28C256F-20JC Octal Transparent D-Type Latches With 3-State Outputs 20-TSSOP -40 to 85
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