參數(shù)資料
型號: AT27BV020-15VI
廠商: ATMEL CORP
元件分類: DRAM
英文描述: High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125
中文描述: 256K X 8 OTPROM, 150 ns, PDSO32
封裝: 8 X 14 MM, PLASTIC, TVSOP1-32
文件頁數(shù): 1/10頁
文件大?。?/td> 215K
代理商: AT27BV020-15VI
1
PLCC, Top View
Features
Fast Read Access Time - 90 ns
Dual Voltage Range Operation
– Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V
±
10% Supply Range
Compatible with JEDEC Standard AT27C020
Low Power CMOS Operation
– 20
μ
A max. (less than 1
μ
A typical) Standby for V
CC
= 3.6V
– 29 mW max. Active at 5 MHz for V
CC
= 3.6V
Wide Selection of JEDEC Standard Packages
– 32-Lead PLCC
– 32-Lead TSOP (8 x 20mm)
– 32-Lead VSOP (8 x 14mm)
– 42-Ball CBGA (8 x 8mm)
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
Programming Algorithm - 100
μ
s/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
Description
The AT27BV020 is a high-performance, low-power, low-voltage 2,097,152-bit one-
time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It
requires only one supply in the range of 2.7 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
AT27BV020
2-Megabit
(256K x 8)
Unregulated
Battery-Voltage
High Speed
OTP EPROM
AT27BV020
TSOP VSOP Top View
Type 1
0902A-A–10/97
Pin Configurations
Pin Name
Function
A0 - A17
Address
O0 - O7
Outputs
CE
Chip Enable
OE
Output Enable
PGM
Program Strobe
(continued)
CBGA Top View
A
B
C
D
E
F
1
2
3
4
5
6
7
GND
A17
A10
A14
A16
A15
O6
O7
NC
A13
A11
A12
VCC
O4
O5
A9
PGM
A8
VCC
NC
NC
NC
NC
NC
O2
NC
O3
NC
A7
VPP
OE
O0
O1
A6
A4
A5
GND
CE
A0
A3
A1
A2
相關PDF資料
PDF描述
AT27BV020-90CC High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125
AT27BV020-90CI High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125
AT27BV020-90JI High Speed CMOS Logic Octal D-Type Flip-Flops with Data Enable 20-PDIP -55 to 125
AT27BV020-90TC High Speed CMOS Logic Octal D-Type Flip-Flops with Data Enable 20-PDIP -55 to 125
AT27BV020-90TI High Speed CMOS Logic Octal D-Type Flip-Flops with Data Enable 20-SOIC -55 to 125
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