參數(shù)資料
型號(hào): AT25F2048N
廠商: Atmel Corp.
英文描述: High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-SOIC -55 to 125
中文描述: SPI串行內(nèi)存200萬(wàn)(262144 × 8)
文件頁(yè)數(shù): 1/17頁(yè)
文件大小: 257K
代理商: AT25F2048N
1
Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
20 MHz Clock Rate
Byte Mode and 256-byte Page Mode for Program Operations
Sector Architecture:
– Four Sectors with 64K Bytes Each
– 256 Pages per Sector
Product Identification Mode
Low-voltage Operation
– 2.7 (V
CC
= 2.7V to 3.6V)
Sector Write Protection
– Protect 1/4, 1/2 or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for
both Hardware and Software Data Protection
Self-timed Program Cycle (30 μs/Byte Typical)
Self-timed Sector Erase Cycle (1 second/Sector Typical)
Single Cycle Reprogramming (Erase and Program) for Status Register
High Reliability
– Endurance: 10,000 Write Cycles Typical
8-lead JEDEC SOIC
Description
The AT25F2048 provides 2,097,152 bits of serial reprogrammable Flash memory
organized as 262,144 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25F2048 is available in a space-saving 8-lead JEDEC SOIC
package.
Rev. 2455D–SEEPR–7/04
SPI Serial
Memory
2M (262,144 x 8)
AT25F2048
Preliminary
Pin Configurations
Pin Name
Function
CS
Chip Select
SCK
Serial Data Clock
SI
Serial Data Input
SO
Serial Data Output
GND
Ground
VCC
Power Supply
WP
Write Protect
HOLD
Suspends Serial Input
8-lead SOIC
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
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