參數(shù)資料
型號: AT17F32A-30BJU
廠商: Atmel
文件頁數(shù): 9/14頁
文件大?。?/td> 0K
描述: IC EEPROM FLASH 32MBIT 44-PLCC
標(biāo)準(zhǔn)包裝: 25
可編程類型: 閃存
存儲容量: 32Mb
電源電壓: 2.97 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
配用: ATDH2225-ND - CABLE ISP FOR AT17
ATDH2200E-ND - CONFIGURATOR PROGRAM BOARD KIT
4
3489C–CNFG–08/07
AT17F32A
5.1
DATA(1)
Three-state DATA output for FPGA configuration. Open-collector bi-directional pin for configura-
tion programming.
5.2
DCLK(1)
Three-state clock. Functions as an input when the Configurator is in programming mode (i.e.
SER_EN is Low) and as an output during FPGA configuration.
5.3
PAGE_EN(2)
Input used to enable page download mode. When PAGE_EN is high the configuration download
address space is partitioned into 4 equal pages. This gives users the ability to easily store and
retrieve multiple configuration bitstreams from a single configuration device. This input works in
conjunction with the PAGESEL inputs. PAGE_EN must be remain low if paging is not desired.
When SER_EN is Low (ISP mode) this pin has no effect.
Notes:
1. This pin has an internal 20 K
Ω pull-up resistor.
2. This pin has an internal 30 K
Ω pull-down resistor.
5.
Pin Description
Name
I/O
AT17F32A
44
PLCC
DATA
I/O
2
DCLK
I/O
8
PAGE_EN
I
1
PAGESEL0
I
20
PAGESEL1
I
33
RESET/
OE
I16
nCS
I
17
GND
19
nCASC
O
28
A2
I
READY
O
35
SER_EN
I38
V
CC
–41
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