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參數(shù)資料
| 型號： | ASM6306C |
| 廠商： | Aplus Integrated Circuits Inc. |
| 英文描述： | VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR |
| 中文描述： | 成本很低的語音合成器與4位微處理器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 499K |
| 代理商： | ASM6306C |
ASM6306C
Data Sheet
Rev 1.0 2002/07/16
1
ASM6306C
–
VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR
1.0 General Description
The
ASM6306C
is very low cost voice synthesizer with 4-bit microprocessor. It has various
features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog
timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS
technology and halt function can minimize power dissipation. Its architecture is similar to RISC,
with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle,
except for program branches and data table read instructions (which need two instruction
cycles).
1.1 Feature
Single power supply can operate from 2.4V through 5
V
Internal Program ROM: 4K x 10-bit
1 sets of 18-bit DPR can access up to 192K x 10 bits data memory space
Data Registers:
64 x 4-bit data RAM (00-1Fh plus 40h-5Fh)
Unbanked special function registers (SFR) range: 20h-3Fh
I/O Ports:
PRA: 4-bit I/O Port A (2Bh)
PRB: 2-bit Output Port B (2Dh)
On-chip clock generator:
Resistive Clock Drive
(
RM)
Timer: 1
Timer0: a 9-bit auto-reload timer/counter
Stack: 2-level subroutine nesting
HALT and Release from HALT function to reduce power consumption
Watch Dog Timer (
WDT
)
Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
Number of instruction: 22
The Voice function can be implemented by microprocessor instruction
One 8-bit COUT output for
ASMxxxxx
This product is empowered by HQPCM Technology by A
pl
licensed from BD&C.
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