
July 2004
AS91L1006BU
AC Electrical Characteristics
Lsp Signal
Tpd
Tco
Toe
Th
Tcl
Tcw
Tch
TCK
TDO
TDI
TMS
High Z
High Z
Tsu
Figure 4 - AS91L1006BU AC Timing Diagram
SYMBOL Parameter
MIN
MAX
UNITS
Tcw
TCK clock pulse width
100
-
ns
Tch
TCK pulse width high
50
-
ns
Tcl
TCK pulse width low
50
-
ns
Tsu
TCK Setup time
30
-
ns
Th
TCK Hold time
40
-
ns
Toe
Neg Edge TCK to valid data enable
20
-
ns
Tco
Neg Edge TCK to valid data
15
-
ns
Tpd
Pass through Mode Primary/Lsp Delay
-
10
ns
Table 12 - AS91L1006BU AC Timing Information
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