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參數(shù)資料
| 型號： | AS8S128K32Q1-20/IT |
| 廠商： | AUSTIN SEMICONDUCTOR INC |
| 元件分類： | SRAM |
| 英文描述： | 128K x 32 SRAM SRAM MEMORY ARRAY |
| 中文描述： | 128K X 32 MULTI DEVICE SRAM MODULE, 20 ns, CQFP68 |
| 封裝： | 0.140 INCH HEIGHT, CERAMIC, QFP-68 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 241K |
| 代理商： | AS8S128K32Q1-20/IT |
SRAM
AS8S128K32
AS8S128K32
Rev. 4.1 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55
°C
≤TA≤125°C; Vcc = 5v ±10%)
SYMBOL MIN MAX MIN MAX
MIN
MAX MIN MAX MIN MAX
MIN
MAX UNITS NOTES
READ CYCLE
READ cycle time
tRC
15
17
20
25
35
45
ns
Address access time
tAA
15
17
20
25
35
45
ns
Chip enable access time
tACE
15
17
20
25
35
45
ns
Output hold from address change
tOH
22
2
ns
Chip enable to output in Low-Z
tLZCE
2
ns
4, 6, 7
Chip disable to output in High-Z
tHZCE
7
8
9
10
14
15
ns
4, 6, 7
Chip enable to power-up time
tPU
00
0
4
Chip disable to power-down time
tPD
15
17
20
25
35
45
4
Output enable access time
tAOE
6
7
8
12
ns
Output enable to output in Low-Z
tLZOE
0
ns
4, 6
Output disable to output in High-Z
tHZOE
6
7
9
12
ns
4, 6, 7
WRITE CYCLE
WRITE cycle time
tWC
15
17
20
25
35
45
ns
Chip enable to end of write
tCW
12
15
17
20
22
ns
Address valid to end of write
tAW
12
15
17
20
22
ns
Address setup time
tAS
00
0
ns
Address hold from end of write
tAH
11
1
ns
WRITE pulse width
tWP1
12
1
12
1
15
17
20
ns
WRITE pulse width
tWP2
12
1
12
1
15
17
20
ns
Data setup time
tDS
8
9
12
15
ns
Data hold time
tDH
11
1
ns
Write disable to output in Low-z
tLZWE
2
ns
4, 6, 7
Write enable to output in High-Z
tHZWE
7
9
10
11
14
15
ns
4, 6, 7
-35
-45
DESCRIPTION
-20
-25
-17
-15
NOTES:
1) For OE\ = HIGH condition. For OE\ = LOW condition
tWP1 = tWP2 = 15 ns MIN.
相關PDF資料 |
PDF描述 |
|---|---|
| AS8S128K32Q1-20/XT | 128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-25/883C | 128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-25/IT | 128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-25/XT | 128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-35/883C | 128K x 32 SRAM SRAM MEMORY ARRAY |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AS8S128K32Q1-25/883C | 制造商:AUSTIN 制造商全稱:Austin Semiconductor 功能描述:128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-25/IT | 制造商:AUSTIN 制造商全稱:Austin Semiconductor 功能描述:128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-25/Q | 制造商:Micross Components, Inc. 功能描述:SRAM-MCM, 4MB - Trays |
| AS8S128K32Q1-25/XT | 制造商:AUSTIN 制造商全稱:Austin Semiconductor 功能描述:128K x 32 SRAM SRAM MEMORY ARRAY |
| AS8S128K32Q1-35/883C | 制造商:AUSTIN 制造商全稱:Austin Semiconductor 功能描述:128K x 32 SRAM SRAM MEMORY ARRAY |
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