參數(shù)資料
型號: AS3517
廠商: ams
文件頁數(shù): 67/94頁
文件大?。?/td> 0K
描述: IC CODEC AFE AUDIO STER 81-CTBGA
標準包裝: 250
類型: 音頻編解碼器
應用: 便攜式音頻,電話
安裝類型: 表面貼裝
封裝/外殼: 81-TFBGA
供應商設備封裝: 81-CTBGA(9x9)
包裝: 托盤
AS3517 V17
Data Sheet, Confidential
2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
6 Pinout and Packaging
6.1
Pin Description
Table 1
Pinlist CTBGA81
Ball PinName
Type
Function
G7
AGND
Analog I/O
Analog Reference Voltage (AVDD/2) buffer cap terminal
H7
AVDD
Supply
Analog Circuit VDD, connected to LDO1 on BGA substrate
J9
AVSS
Supply
Analog Circuit VSS
E2
BATTEMP
Analog I/O
Charger Battery Temperature Sensor input (100k NTC)
D3
BVDD
Supply
Positive (Battery) Supply Terminal, 5.5V max.
E3
BVDD
Supply
Positive (Battery) Supply Terminal, 5.5V max.
B8
BVDDH
Supply
Positive (Battery) Supply Terminal of Headphone Amplifier, 5.5V
max.
A8
BVDDC1
Supply
Positive (Battery) Supply Terminal of DCDC1, 5.5V max.
A4
BVDDC2
Supply
Positive (Battery) Supply Terminal of DCDC2, 5.5V max.
B4
BVDDC3
Supply
Positive (Battery) Supply Terminal of DCDC3, 5.5V max.
F2
BVDDR
Supply
RTC Positive (Battery) Supply terminal, 5.5V max
F1
CHG_IN
Analog Input
Charger Positive Supply Terminal, 5.5V max
E1
CHG_OUT
Analog Output
Charger Output prog. for Ichg 50-400mA or Vchg 3.9-4.25V
C1
CN_GEXT
Digital output
USB charge pump CN of flying cap / Output to control USB-Host
DCDC N-Switch
C2
CP_CP
Digital output
USB charge pump CP of flying cap
G3
CSCL
Digital input with pull up
Clock Input of two wire interface
H3
CSDA
Digital I/O with pull up
Data I/O of two wire interface
B7
CVDD1
Analog Input
CVDD1 and Feedback pin
B5
CVDD2
Analog Input
CVDD2 and Feedback Pin
B3
CVDD3
Analog Input
CVDD3 and Feedback Pin
A6
CVSS1
Supply
CVDD1 StepDown Neg. Supply terminal
B6
CVSS2
Supply
CVDD2 StepDown Neg. Supply terminal
A2
CVSS3
Supply
CVDD3 Stepdown Neg. Supply terminal
B2
CVSS15
Supply
DCDC15V Neg. Supply terminal
G1
DVDD
Supply
Digital Circuit VDD, connected to LDO2 on BGA substrate
J2
DVSS
Supply
Digital Circuit VSS
H2
FVDD
Supply
ADC&DAC Digital Circuit VDD (1.8-3.6V)
F3
HBT
Digital input with pull down
Heartbeat Input for CPU supervision
C8
HPCM
Analog Output
Headphone Common GND Output for DC-coupled speakers
D9
HPGND
Analog I/O
Headphone Amplifier reference buffer cap terminal
A9
HPL
Analog Output
Headphone Amplifier Output Left Channel
C9
HPR
Analog Output
Headphone Amplifier Output Right Channel
B1
ISINK
Analog Output
DCDC15V Load Current Sink terminal (e.g. white LED)
D7
LIN1L
Analog Input
Line Input 1 Left Channel
D6
LIN1R
Analog Input
Line Input 1 Right Channel
F8
LIN2L
Analog Input
Line Input 2 Left Channel
F7
LIN2R
Analog Input
Line Input 2 Right Channel
C7
LOUT1L
Analog Output
Line Output Left Channel
C6
LOUT1R
Analog Output
Line Output Right Channel
D8
LOUT2L
Analog Output
Line Output Left Channel
E7
LOUT2R
Analog Output
Line Output Right Channel
G4
LRCLK
Digital I/O with pull down
I2S Left/Right Clock
A7
LXC1
Digital output
CVDD1 StepUp switch output to coil
A5
LXC2
Digital output
CVDD2 StepUp switch output to coil
A3
LXC3
Digital output
CVDD3 StepUp switch output to coil
Revision 1v3
6
- 93
ams
AG
Technical
content
still
valid
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