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參數(shù)資料
| 型號： | APW7066QAC-TRL |
| 廠商： | ANPEC ELECTRONICS CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Dual Synchronous Buck PWM Controllers and One Linear Controller |
| 中文描述： | SWITCHING CONTROLLER, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, QFN-32 |
| 文件頁數(shù)： | 21/33頁 |
| 文件大?。?/td> | 338K |
| 代理商： | APW7066QAC-TRL |
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Copyright
ANPEC Electronics Corp.
Rev. A.7 - Mar., 2008
APW7066
28
Application Information (Cont.)
response of COMP voltage; smaller caps may give
a faster response.
The output current has faster rising time during
short; the COMP pin will have a sharp rise.
However, if the current rises too fast, it may cause
a false trip. The output capacitance and its ESR
can affect the rising time of the current during short.
Layout Consideration
In high power switching regulator, a correct layout is
important to ensure proper operation of the regulator.
In general, interconnecting impedances should be
minimized by using short, wide printed circuit traces.
Signal and power grounds are to be kept separate and
finally combined using ground plane construction or
single point grounding. Figure 14. illustrates the layout,
with bold lines indicating high current paths; these
traces must be short and wide. Components along
the bold lines should be placed lose together. Below
is a checklist for your layout :
The metal plate of the bottom of the packages
(TSSOP-24 and QFN-32) must be soldered to the
PCB and connected to the GND plane on the
backside through several thermal vias.
Keep the switching nodes (UGATE, LGATE and
PHASE) away from sensitive small signal nodes
since these nodes are fast moving signals.
Therefore, keep traces to these nodes as short
as possible.
The traces from the gate drivers to the MOSFETs
(UG1, LG1, UG2, LG2, DRIVE3) should be short
and wide.
Decoupling capacitor, compensation component,
the resistor dividers, boot capacitors, and SS
capacitors should be close their pins.
The input capacitor should be near the drain of the
upper MOSFET; the output capacitor should be
near the loads. The input capacitor GND should be
close to the output capacitor GND and the lower
MOSFET GND.
The drain of the MOSFETs (VIN and phase nodes)
should be a large plane for heat sinking.
Short Circuit Protection (Cont.)
V
IN
VOUT
Q1
L1
CIN
APW7066
L
O
A
D
BOOT
VCC12
SS
FB
GND
CSS
CVCC
CBOOT
Q2
COUT
VCC
LG
UG
PGND
CVCC12
VREF
CVREF
REFOUT
CREFOUT
Figure 14. Layout Guidelines
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| APW7066QAC-TU | 制造商:ANPEC 制造商全稱:Anpec Electronics Coropration 功能描述:Dual Synchronous Buck PWM Controllers and One Linear Controller |
| APW7066QAC-TUL | 制造商:ANPEC 制造商全稱:Anpec Electronics Coropration 功能描述:Dual Synchronous Buck PWM Controllers and One Linear Controller |
| APW7066RC-TR | 制造商:ANPEC 制造商全稱:Anpec Electronics Coropration 功能描述:Dual Synchronous Buck PWM Controllers and One Linear Controller |
| APW7066RC-TRG | 制造商:ANPEC 制造商全稱:Anpec Electronics Coropration 功能描述:Dual Synchronous Buck PWM Controllers and One Linear Controller |
| APW7066RC-TRL | 制造商:ANPEC 制造商全稱:Anpec Electronics Coropration 功能描述:Dual Synchronous Buck PWM Controllers and One Linear Controller |
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