參數(shù)資料
型號(hào)： APT10M25SVR
廠商： Advanced Power Technology Ltd.
英文描述： Power MOS V is a new generation of high voltage N-Channel enhancement mode power MOSFETs
中文描述： 電源MOS V是一個(gè)高電壓N新一代通道增強(qiáng)型功率MOSFET
文件頁(yè)數(shù)： 1/4頁(yè)
文件大小： 68K
代理商： APT10M25SVR
0
MAXIMUM RATINGS
All Ratings: T
C
= 25
°
C unless otherwise specified.
UNIT
Volts
Amps
Volts
Watts
W/
°
C
°
C
Amps
mJ
STATIC ELECTRICAL CHARACTERISTICS
UNIT
Volts
Amps
Ohms
μ
A
nA
Volts
MIN
TYP
MAX
100
75
0.025
250
1000
±
100
4
2
APT10M25SVR
100
75
300
±
30
±
40
300
2.4
-55 to 150
300
75
30
1500
APT10M25SVR
100V
75A
0.025
Characteristic / Test Conditions
Drain-Source Breakdown Voltage (V
GS
= 0V, I
D
= 250
μ
A)
On State Drain Current
2 5
(V
DS
> I
D(on)
x R
DS(on)
Max, V
GS
= 10V)
Drain-Source On-State Resistance
2
(V
GS
= 10V, 0.5 I
D[Cont.]
)
Zero Gate Voltage Drain Current (V
DS
= V
DSS
, V
GS
= 0V)
Zero Gate Voltage Drain Current (V
DS
= 0.8 V
DSS
, V
GS
= 0V, T
C
= 125
°
C)
Gate-Source Leakage Current (V
GS
=
±
30V, V
DS
= 0V)
Gate Threshold Voltage (V
DS
= V
GS
, I
D
= 1.0mA)
Symbol
V
DSS
I
D
I
DM
V
GS
V
GSM
P
D
T
J
,T
STG
T
L
I
AR
E
AR
E
AS
Parameter
Drain-Source Voltage
Continuous Drain Current @ T
C
= 25
°
C
Pulsed Drain Current
1 5
Gate-Source Voltage Continuous
Gate-Source Voltage Transient
Total Power Dissipation @ T
C
= 25
°
C
Linear Derating Factor
Operating and Storage Junction Temperature Range
Lead Temperature: 0.063" from Case for 10 Sec.
Avalanche Current
1 5
(Repetitive and Non-Repetitive)
Repetitive Avalanche Energy
1
Single Pulse Avalanche Energy
4
Symbol
BV
DSS
I
D(on)
R
DS(on)
I
DSS
I
GSS
V
GS(th)
5
CAUTION:
These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed.
USA
405 S.W. Columbia Street
EUROPE
Avenue J.F. Kennedy Bat B4 Parc Cadéra Nord
Bend, Oregon 97702-1035
Phone: (541) 382-8028
FAX: (541) 388-0364
F-33700 Merignac - France
Phone: (33) 557921515
FAX: (33) 5 56479761
APT Website - http://www.advancedpower.com
POWER MOS V
G
D
S
Power MOS V
is a new generation of high voltage N-Channel enhancement
mode power MOSFETs. This new technology minimizes the JFET effect,
increases packing density and reduces the on-resistance. Power MOS V
also achieves faster switching speeds through optimized gate layout.
Faster Switching
100% Avalanche Tested
Lower Leakage
Surface Mount D
3
PAK Package
D
3
PAK
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