參數(shù)資料
型號(hào): APR9600
廠商: Aplus Integrated Circuits Inc.
英文描述: SINGLE-CHIP VOICE RECORDING & PLAYBACK DEVICE FOR SINGLE 60 SECOND MESSAGE
中文描述: 單芯片語(yǔ)音記錄
文件頁(yè)數(shù): 6/17頁(yè)
文件大小: 2158K
代理商: APR9600
Page 6
Single-Chip Voice Recording & Playback Device for Multiple 40- to 60-Second Messages
Microprocessor Controlled Message Management
The
APR9600
to help simplify microprocessor controlled message manage-
ment. When controlling messages the microprocessor essen-
tially toggles pins as described in the message management
sections describe previously. The /Busy, /Strobe, and
/M7_END pins are included to simplify handshaking between
the microprocessor and the APR9600
The /Busy pin when low indicates to the host processor that
the device is busy and that no commands can be currently
accepted. When this pin is high the device is ready to accept
and execute commands from the host.
The /Strobe pin pulses low each time a memory segments is
used. Counting pulses on this pin enables the host processor
to accurately determine how much recording time has been
used, and how much recording time remains. The
APR9600
has a total of eighty memory segments.
The /M7_END pin is used as an indicator that the device has
stopped its current record or playback operation. During
recording a low going pulse indicates that all memory has
been used. During playback a low pulse indicates that the
last message has played.
Microprocessor control can also be used to link several
APR9600
devices together in order to increase total available
recording time. In this application both the speaker and
microphone signals can be connected in parallel. The micro-
processor will then control which device currently drives the
speaker by enabling or disabling each device using their
respective /CE pins. A continuous message can not be
recorded in multiple devices however because the transition
from one device to the next will incur a delay that is notice-
able upon playback. For this reason it is recommended that
message boundaries and device boundaries always coincide.
Signal Storage
The
APR9600
instantaneous voltage samples in non-volatile FLASH mem-
ory cells. Each memory cell can support voltage ranges from
0 to 256 levels. These 256 discrete voltage levels are the
equivalent of 8-bit (2
8
=256) binary encoded values. During
playback the stored signals are retrieved from memory,
smoothed to form a continuous signal, and then amplified
before being fed to an external speaker.
Sampling Rate & Voice Quality
According to the Shannon’s sampling theorem, the highest
possible frequency component introduced to the input of a
sampling system must be equal to or less than half the sam-
pling frequency if aliasing errors are to be eliminated. The
APR9600
automatically filters its input, based on the selected
sampling frequency, to meet this requirement.
Higher sampling rates increase the bandwidth and hence the
voice quality, but they also use more memory cells for the
same length of recording time. Lower sampling rates use
fewer memory cells and effectively increase the duration
capabilities of the device, but they also reduce incoming sig-
nal bandwidth. The accommodates sampling rates
as high as 8 kHz and as low a 4 kHz. You can control the
quality/duration trade off by controlling the sampling fre-
quency.
An internal oscillator provides the
APR9600
Oscillator frequency can be changed by changing the resis-
tance from the OscR pin to GND. Table 2 summarizes resis-
tance values and the corresponding sampling frequencies, as
well as the resulting input bandwidth and duration.
sampling clock.
Table 2
Reference Rosc Value & Sampling Frequency
Ref Rosc
Sampling
Frequency
Input
Bandwidth
Duration
84 K
W
38 K
W
24 K
W
4.2 kHz
6.4 kHz
2.1 kHz
3.2 kHz
60 sec
40 sec
8.0 kHz
4.0 kHz
32 sec
APR9600
APLUS
NOTICE: Rosc table above is for reference only,different
lots ICs will have somewhat different Rosc value
performance..
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