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參數(shù)資料
| 型號(hào)： | APC5800E |
| 廠商： | Aplus Integrated Circuits Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:66; Series:MS27656; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:19; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:19-35 RoHS Compliant: No |
| 中文描述： | 解壓縮語音IC |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 261K |
| 代理商： | APC5800E |
APLUS INTEGRATED CIRCUITS INC.
APC5800E
z
3FEA
: B
ANK REGISTER FOR COPROCESSOR
. W
RITE ONLY
.
z
3FEB
: B
ANK REGISTER
MSB
BIT FOR COPROCESSOR
. W
RITE ONLY
.
B
ANK REGISTER IS
9
BITS REGISTER
($3FEB
BIT
0, $3FEA
BIT
7-0). T
HE MEMORY RANGE OF
BANK IS FROM
$4000
TO
$7FFF.
B
IT
7-1 : R
ESERVED
.
www.aplusinc.com.tw
TEL : 886-2-2782-9266
z
3FEC,3FED
: T
IMER
A
DATA OR TONE
0
GENERATOR
. R
EAD AND WRITE
. A
FTER TIMER
_
A BE
ENABLED
,
THE TIMER WILL START TO COUNT DOWN
. W
HEN TIMER COUNTS TO ZERO
,
THE
TIMER WILL COUNT FROM THE INITIAL VALUE AND TIMER
_
A
IRQ
WILL BE HAPPEN
.
T
HE TIME ELAPSE
= (($3FED,$3FEC)+1) / (T
IMER
A
INPUT CLOCK
).
z
3FEE :
T
IMER
B
LOW BYTE DATA
. R
EAD AND WRITE
.
z
3FEF
: T
IMER
B
HIGH BYTE DATA
. R
EAD AND WRITE
.
A
FTER TIMER
_
B BE ENABLED
,
THE TIMER WILL START TO COUNT DOWN
. W
HEN TIMER COUNTS
TO ZERO
,
THE TIMER WILL COUNT FROM THE INITIAL VALUE AND TIMER
_
B
NMI
WILL BE
HAPPEN
.
T
HE TIME ELAPSE
= (($3FEF,$3FEE)+1) / (T
IMER
B
INPUT CLOCK
).
z
3FF0
: P
ORT
_
A
[15..8]
DIRECTION REGISTER
. W
RITE ONLY
.
A
N
‘1’
IN THIS REGISTER WILL SET THE CORRESPONDING PIN OF PORT
_
A TO BE OUTPUT
.
T
HE DEFAULT VALUE FOR EACH BIT IS ZERO
.
z
3FF1
: P
ORT
_
A
[15..8]
DATA REGISTER
. R
EAD AND WRITE
.
z
3FF2
: P
ORT
_
B
[11..8]
DATA REGISTER
. W
RITE ONLY
.
B
IT
3-0: P
ORT
_
B PIN
11
TO PIN
8.
B
IT
7-4 : R
ESERVED
.
z
3FF4 :
B
ANK REGISTER FOR
CPU. W
RITE ONLY
.
z
3FF5
: B
ANK REGISTER
MSB
BIT FOR
CPU. W
RITE ONLY
.
B
ANK REGISTER IS
9
BITS REGISTER
($3FF5
BIT
0, $3FF4
BIT
7-0).
T
HE MEMORY RANGE OF BANK IS FROM
$4000
TO
$7FFF.
B
IT
1: R
ESERVED
.
B
IT
2: = 1 V
OICE
0
BUFFER BE TRANSFERRED TO
DAC
PORT DIRECTLY
.(
DEFAULT
)
= 0 V
OICE
0
BUFFER WILL BE TRANSFERRED TO
DAC
PORT WHEN TIMER
_
B
NMI
HAPPEN
.
B
IT
7-3 : R
ESERVED
.
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