參數(shù)資料
型號(hào): AOD480
廠商: ALPHA AND OMEGA SEMICONDUCTOR
元件分類: JFETs
英文描述: 25 A, 30 V, 0.023 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252
封裝: GREEN, DPAK-3
文件頁(yè)數(shù): 2/6頁(yè)
文件大小: 123K
代理商: AOD480
AOD480
Symbol
Min
Typ
Max
Units
BVDSS
30
V
0.004
1
TJ=55°C
5
IGSS
100
nA
VGS(th)
1
1.6
2.5
V
ID(ON)
30
A
19
23
TJ=125°C
24
30
29
36
m
gFS
10
24
S
VSD
0.77
1
V
IS
4.3
A
Ciss
621
820
pF
Coss
118
pF
Crss
85
pF
Rg
0.8
1.5
Qg(10V)
11.3
14
nC
Qg(4.5V)
5.7
7
nC
Qgs
2.1
nC
Qgd
3
nC
tD(on)
4.5
6.5
ns
tr
3.1
5
ns
tD(off)
15.1
23
ns
tf
2.7
5
ns
trr
15.5
21
ns
Qrr
7.1
10
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge IF=20A, dI/dt=100A/s
Drain-Source Breakdown Voltage
On state drain current
ID=250A, VGS=0V
VGS=10V, VDS=5V
VGS=10V, ID=20A
Reverse Transfer Capacitance
IF=20A, dI/dt=100A/s
Electrical Characteristics (TJ=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter
Conditions
IDSS
A
Gate Threshold Voltage
VDS=VGS ID=250A
VDS=24V, VGS=0V
VDS=0V, VGS= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
RDS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
m
VGS=4.5V, ID=8A
IS=1A,VGS=0V
VDS=5V, ID=8A
Total Gate Charge
Gate Source Charge
Gate resistance
VGS=0V, VDS=0V, f=1MHz
Turn-On Rise Time
Turn-Off DelayTime
VGS=10V, VDS=15V, RL=0.75,
RGEN=3
Turn-Off Fall Time
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
VGS=10V, VDS=15V, ID=20A
Total Gate Charge
Gate Drain Charge
VGS=0V, VDS=15V, f=1MHz
SWITCHING PARAMETERS
A: The value of R θJA is measured with the device mounted on 1in
2 FR-4 board with 2oz. Copper, in a still air environment with T
A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current is limited by package.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1
ST 2008).
Rev2: July. 2009
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
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