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參數(shù)資料
| 型號(hào)： | AN649 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | HFTA-04.0: Optical/Electrical Conversion in SDH/SONET Fiber Optic Systems |
| 中文描述： | HFTA - 04.0：光/電轉(zhuǎn)換/ SDH中的SONET光纖系統(tǒng) |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大?。?/td> | 247K |
| 代理商： | AN649 |
allow only a limited power budget in the O/E units. Maxim's STM 4 chipset makes extensive
use of 27GHz, high-speed technology in reducing power dissipation. It can further reduce
power dissipation by operating on +3.3V instead of today's more common +5V. Rather than
require an additional source of +5V, the O/E unit can use the +3.3V available for CMOS
system components. Or, to be flexible, it can share an existing +5V supply with the front-end
ICs. In addition to these features, which pertain to the chipset as a whole, features specific to
the individual components are described in the following sections.
Preamplifier (i.e., transimpedance amplifier)
The transimpedance amplifier (MAX3664) converts a single-ended current from the detector
diode to a single-ended voltage, which is amplified and converted to a differential signal.
Typical amplification is 6kW. This gain level can be increased by 6dB if the data outputs
(back-terminated internally with 60W) are not externally terminated as well. For input currents
beyond 100μAp-p, the high gain leads to a limited differential output-voltage swing of
900mVp-p. A DC-cancellation circuit helps to deliver differential output voltages with low
pulse-width distortion over a wide range of input-current levels.
Low input-related noise is achieved by careful circuit design and by limiting the bandwidth to
590MHz at an input capacitance of 1.1pF. Assuming a simple PIN detector diode is used, the
low noise enables a typical input sensitivity of -32dBm optical power. Power dissipation is less
than 85mW at +3.3V. Small size and an optimal bondpad configuration make this component
suitable for use in PIN-TIA modules, which combine a PIN diode and transimpedance
amplifier in one package (a TO package, for instance).
Clock and Data Recovery (CDR)
The main functions of the clock and data recovery IC (MAX3675) are to recover the clock
signal from the received data stream and to regenerate the data's timing and amplitude
characteristics. Because the chip integrates an offset-compensated limiting amplifier as well,
two standard products (MAX3664 and MAX3675) contain all the electronics necessary for an
O/E receiver unit.
The MAX3675 offers a high-sensitivity differential analog input (3mVp-p) and a differential
PECL digital input, providing flexibility that supports a wide range of receiver applications.
The MAX3675's power dissipation depends on the input in use: 215mW with analog inputs, or
155mW with digital inputs. Total power consumption for a complete receiver based on the
MAX3664 and MAX3675 is less than 300mW at +3.3V.
An LOP alarm function and input-power detector are integrated with the limiting amplifier. The
LOP alarm warns if the input signal falls below a user-defined threshold. The reference for this
threshold is an internal bandgap circuit that is independent of the supply voltage. To ensure
chatter-free operation for input signals near the threshold, the LOP's TTL-monitor output
includes hysteresis. The power detector provides a receive signal-strength indicator (RSSI pin)
whose output voltage is proportional to input power and is linear in decibels.
The PLL necessary for clock recovery is fully integrated and does not require an external
reference clock. It consists of a phase/frequency detector, a loop-filter amplifier with external
RC network, and a 622MHz voltage-controlled oscillator. The PLL provides an LOL signal
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