參數(shù)資料
型號: AN17000A
廠商: PANASONIC CORP
元件分類: 音頻控制
英文描述: Audio signal processing IC for notebook PC
中文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO56
封裝: 0.300 INCH, 1 MM HEIGHT, HEAT SINK, PLASTIC, TSOP-56
文件頁數(shù): 17/25頁
文件大?。?/td> 351K
代理商: AN17000A
AN17000A
17
SDC00042BEB
I
Applicaon Notes (continude)
1. Pin descriptions (continude)
Pin 10 (power supply (speaker small signal use))
Please put a capacitor of 33
μ
F between GND (pin 38) and pin 10.
Pin 11, pin 12 (L-ch., R-ch. headphone output)
In considerration of headphone load, suitable value of C5, C6 is 220
μ
F.
Pin 13 (GND (headphone power use))
Pin 14 (GND (headphone small signal use))
Pin 15 (N.C.)
Pin 15 connects to IC's heat sink.
Pin 16 (power supply (headphone power use))
Please put an about 47
μ
F capacitor between pin 13 and pin 14.
Pin 17 (power supply (headphone small signal use))
Please put an about 47
μ
F capacitor between pin 13 and pin 14.
Pin 18, Pin 19, Pin 20, Pin 21 (N.C.)
Pin 22 (beep input)
The beep output at head phone (HP) output is 0.864
×
10 k
/(1 k
+
R1) [Vp-p], where R1 is the resistance of
the resistor between pin 34 and GND.
Suitable value of R3 is 25 k
and suitable value of C8 is 1
μ
F.
Pin 23 (N.C.)
Pin 24, Pin 25 (headphone amplifier L-ch., R-ch. input)
Suitable value of C9, C10 is 1
μ
F, because input impedance of headphone power amplifier is 20 k
.
If no resistors are connected to pin 24 and pin 25 from previous stage, the headphone amplifier has the gain of
about 13 dB (at maximum volume). If input of 1.1/5 V[rms] or more is possibly inputted, the input should be
attenuated by connecting resistors to pin 24 and pin 25 from previous stage because the output dynamic range is
about 1.1 V[rms].
The gain is 20 k
/(R4
+
20 k
)
×
4.5, where R4 and R5 are the resistance of resistors connected to pin 24 and
pin 25 from the previous stage and R4
=
R5.
Pin 26 (N.C.)
Pin 27, Pin 28 (line amplifier L-ch., R-ch. input)
Suitable value of C11, C12 is 1
μ
F, because input impeadance of line amplifier is 50 k
.
If no resistors are connected to pin 27 and pin 28 from previous stage, the line amplifier has the fixed gain of
about 6 dB. If input of 1.1/2 V[rms] or more is possibly inputted, the input should be attenuated by connecting
resistors to pin 27 and pin 28 from previous stage because the output dynamic range is about 1.1 V[rms].
The gain is 50 k
/(RX
+
50 k
)
×
2, where RXs are the resistance of resistors connected to pin 27 and pin 28
from the previous stage.
Pin 29 (line amplifier R-ch. output)
Suitable value of C13 is 1
μ
F.
Pin 30 (GND (line amplifier))
Pin 31 (line amplifier L-ch. output)
Suitable value of C14 is 1
μ
F.
Pin 32 (beep control (line amplifier))
A value of VR1 is bigger, output level is smaller.
Around 10 k
is suitable as the maximum value for VR1. The beep output at line output is 0.9
×
10 k
/(1
k
+
VR1) V[p-p], where VR1 is the resistance of the resistor between pin 34 and GND.
Pin 33 (line amplifier mute control)
Suitable value of R6 is 75 k
and suitable value of C15 is 0.68
μ
F.
Rise time is about 20 ms.
If value of R and C is smaller, switching time is shorter but there is a possibility of pop sound occurrence.
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