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參數(shù)資料
| 型號： | AN12974A |
| 廠商： | PANASONIC CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | Stereo power amplifier with built-in AGC circuitry and SPATIALIZER |
| 中文描述： | 2 CHANNEL, AUDIO AMPLIFIER, QCC32 |
| 封裝： | 5 X 5 MM, XLGA-32 |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 1157K |
| 代理商： | AN12974A |
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AN12974A
14
SDC00058AEB
Technical Data (continued)
y
The power and logic timing
As for the timing of power on/off and each control pin, it much more recommends a procedure below the purpose of the rejection
sound measure in changing.
The speaker output system
The basic procedure at the time of power on
1. The power off condition
Both the standby and the mute are in the
on condition.
2. Power on
3. The standby cancellation
4. The mute cancellation
The basic procedure at the time of power off.
1. The power on condition
Both the standby and the mute are in the
off condition.
2. Mute on
3. Standby on
4. Power off
y
The power timing of V
CC
and V
CC-SP
This IC have not a standup and falling order in V
CC
and V
CC-SP
.
y
Pin 6: AGC on/off switch terminal
In order to reduce current consumption during SP-save or standby, when SP-save switch is on (when pin 9 is low-level), also set
pin 6 to low-level.
(When standby switch is on (pin 16 is low-level), SP-save switch will be on.)
y
Pin 32: 3D surround spatializer
on/off switch
In order to reduce current consumption during standby, when standby switch is on (pin 16 is low-level), also set pin 32 to low-
level.
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