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參數(shù)資料
| 型號： | AMIS30660CANH6RG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSCEIVER CAN HS 5V 8SOIC |
| 標準包裝： | 3,000 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | CAN |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
AMIS30660
http://onsemi.com
4
FUNCTIONAL DESCRIPTION
Operating Modes
The behavior of AMIS30660 under various conditions is
illustrated in Table 5 below. In case the device is powered,
one of two operating modes can be selected through Pin S.
Table 5. FUNCTIONAL TABLE OF AMIS30660 (X = DON’T CARE)
VCC
Pin TxD
Pin S
Pin CANH
Pin CANL
Bus State
Pin RxD
4.75 V to 5.25 V
0
0 (or Floating)
High
Low
Dominant
0
4.75 V to 5.25 V
X
1
VCC / 2
Recessive
1
4.75 V to 5.25 V
1 (or Floating)
X
VCC / 2
Recessive
1
VCC < PORL (Unpowered)
X
0 V < CANH
< VCC
0 V < CANL <
VCC
Recessive
1
PORL < VCC < 4.75 V
> 2 V
X
0 V < CANH
< VCC
0 V < CANL <
VCC
Recessive
1
HighSpeed Mode
If Pin S is pulled low (or left floating), the transceiver is
in its highspeed mode and is able to communicate via the
bus lines. The signals are transmitted and received to the
CAN controller via the Pins TxD and RxD. The slopes on the
bus line outputs are optimized to give extremely low
electromagnetic emissions.
Silent Mode
In silent mode, the transmitter is disabled. All other IC
functions continue to operate. The silent mode is selected by
connecting Pin S to VCC and can be used to prevent network
communication from being blocked, due to a CAN
controller which is out of control.
Overtemperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 160
°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC is reduced. All other
IC functions continue to operate. The transmitter offstate
resets when Pin TxD goes high. The thermal protection
circuit is particularly necessary when a bus line
shortcircuits.
TxD Dominant Timeout Function
A TxD dominant timeout timer circuit prevents the bus
lines from being driven to a permanent dominant state
(blocking all network communication) if Pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the lowlevel on Pin TxD exceeds the
internal timer value tdom, the transmitter is disabled, driving
the bus into a recessive state. The timer is reset by a positive
edge on Pin TxD.
FailSafe Features
A currentlimiting circuit protects the transmitter output
stage from damage caused by an accidental shortcircuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The Pins CANH and CANL are protected from
automotive electrical transients (according to “ISO 7637”;
see Figure 3). Pin TxD is pulled high internally should the
input become disconnected.
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