參數(shù)資料
型號: AMIS-49200-XTP
廠商: ON Semiconductor
文件頁數(shù): 19/22頁
文件大?。?/td> 0K
描述: IC TXRX FIELDBUS MAU 44LQFP
標準包裝: 1,500
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: MDS-MAU
電源電壓: 4.75 V ~ 6.2 V
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應商設備封裝: 44-LQFP(10x10)
包裝: 帶卷 (TR)
AMIS-492x0
Table 1: Pin Numbers and Signal Description
Signal Name
Pin No.
I/O (Note 1)
Description
VSS
1
Ground
Connect to ground
VREF
2
AO
Internal bandgap voltage (1.18V)
VMID
3
AO
2V bias voltage for AC signals
N_PFAIL1
4
AI/O
Power fail alarm at VCC input. This pin is an open-drain output of negative logic.
N_PFAIL2
5
AI/O
Power fail alarm at VDD input. This pin is an open-drain output of negative logic.
SHSETIN
6
AI
Feedback (non-inverting) input for the shunt regulator
SHSET
7
AO
Divided voltage of VCC input. Feeding this voltage to SHSETIN pin results in 5V voltage at
VCC.
SHUNT
8
AI
Control pin of the shunt regulator. Its sink current (25mA max) is controlled so that the voltage
at SHSETIN is equal to VREF (1.18V).
VSS/
SGND
9
Ground
The current absorbed by SHUNT pin (25mA max) is fed to this pin, which must be connected to
the ground level
VSS
10
Ground
VSS
11
Ground
SRSETIN
12
AI
Feedback (inverting) input for the series regulator. The series regulator controls its output
(SRAO) to make this input voltage is equal to VREF (1.18V).
SRSET
13
AO
Divided voltage of VO output. Feeding this voltage into SRSETIN pin results in 3V at VO pin.
SRAO
14
AO
Output pin of an operational amplifier for the series regulator
SRTR
15
AI
Gate of a PMOS transistor for the series regulator
VO
16
AO
Output pin of the series regulator (20mA max)
VDD
17
Digital supply
Supply voltage input for digital block
VCC
18
Analog supply
Analog supply voltage
CRT
19
AI/O
Current integration to limit output slew rate
VSS
20
Ground
VDRV
21
AO
Output of an operational amplifier for slew rate control. This signal can be fed to current driver.
VSS
22
Ground
CCINP
23
AI
Non-inverting input of an operational amplifier for transmission current driver
CCINM
24
AI
Inverting input of an operational amplifier for transmission current driver
CCOUT
25
AO
Output of an operational amplifier for transmission current driver
MDS_CTRL
26
AI
For POL = VDD MDS_CTRL should = VSS
For POL = VSS MDS_CTRL can be tied to VDD or used as a not reset to control when transmit
communications will be enabled
SIGIN
27
AI
Input pin of the band-pass filter. This pin is connected to VMID bias level with 270K resistor.
HPF
28
AI
Feedback signal of high-pass filter. This pin is connected to the output of an op-amp for high
pass filter with 75K resistor.
LPF
29
AI
Non-inverting input of an operational amplifier for the low-pass filter
FLT
30
AI
Input pin of low-pass filter for feedback. This pin is connected to the output of the high-pass
filter through 20k
Ω and the non-inverting input of the low-pass filter through 54kΩ resisters.
FLTOUT
31
AO
Output of the operational amplifier for the low-pass filter. This signal is internally connected to
non-inverting input to form a voltage-follower.
CCD
32
AO
Current integration (for carrier detect circuit)
VSS
33
Ground
Rev. 6 | Page 6 of 22 | www.onsemi.com
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