參數(shù)資料
型號(hào): AMIS-49200-XTD
廠商: ON Semiconductor
文件頁數(shù): 6/22頁
文件大?。?/td> 0K
描述: TXRX FIELDBUS MAU 44-LQFP
標(biāo)準(zhǔn)包裝: 160
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: MDS-MAU
電源電壓: 4.75 V ~ 6.2 V
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 1116 (CN2011-ZH PDF)
其它名稱: 766-1019
AMIS-492x0
4.3 Transmit Block
The transmit block contains four sub-blocks:
1.
MDS-interface – decodes input signals to generate internal control signals.
2.
Tri-level modulator – generates current signals used as inputs to the slew-rate controller.
3.
Slew rate controller – converts current to three distinct VDRV voltage levels (VS, VH, VL).
4.
Current drive amplifier – op amp designed to drive current drivers for 31.25kbps voltage-mode medium.
4.3.1. MDS-interface
The MDS-interface decodes input signals to generate internal control signals. The POL pin is used to select the polarity of TxE (transmit
enable). The TxE and TxS (transmit signal) are the MDS-MAU interface signals. These three signals are CMOS logic signals powered
by the VDD supply voltage. When POL is connected to GND, TxE is assumed to be active high (positive logic). Likewise, if POL is
connected to VDD, TxE is assumed to be active low (negative logic).
See Table 1 on page 7, Table 11, and Figure 8 to see how
MDS_CTRL Pin 26 can be used to control MDS interface operation.
Table 11 shows the resulting VDRV output for the various
combinations of interface signals.
Table 11: MDS-interface Logic
POL
TxE
TxS
VDRV
Low
High
VS
Low
VH
Low
High
VL
Low
VH
Low
High
VL
Low
High
VS
Figure 8: MDS Interface
4.3.2. Tri-level Modulator
The tri-level modulator switches current signals into a summing node. The slew rate controller converts the current to a voltage signal,
VDRV. The DC level of silence (VS) is nominally 2.5V. Transmission high (VH ) is nominally 2.9V and transmission low (VL) is nominally
2.1V, yielding an amplitude of 0.8V.
Rev. 6 | Page 14 of 22 | www.onsemi.com
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