
AMD
21
Am85C30
0
0
1
1
0
1
0
1
0
0
1
1
Write Register 1
Write Register 4
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Ext Int Enable
Tx Int Enable
Parity is Special Condition
Rx Int Disable
Rx Int on First Character or Special Condition
Int on All Rx Characters or Special Condition
Rx Int on Special Condition only
Wait/DMA Request on Receive/Transmit
Wait/DMA Request Function
Wait/DMA Request Enable
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Write Register 2
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
V0
V1
V2
V3
V4
V5
V6
V7
Interrupt Vector*
Write Register 6
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
0
1
0
0
1
1
0
1
0
1
0
0
1
1
0
1
0
1
Write Register 5
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Tx CRC Enable
RTS
SDLC
/CRC-16
Tx Enable
Send Break
0
0
1
1
0
1
0
1
Write Register 3
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Rx Enable
Sync Character Load Inhibit
Address Search Mode (SDLC)
Rx CRC Enable
Enter Hunt Mode
Auto Enable
0
0
1
1
0
1
0
1
Parity Enable
Parity Even/
Odd
Sync Modes Enable
1 Stop Bit/Character
1 1/2 Stop Bits/Character
2 Stop Bits/Character
8-Bit Sync Character
16-Bit Sync Character
SDLC Mode (01111110 Flag)
External Sync Mode
X1 Clock Mode
X16 Clock Mode
X32 Clock Mode
X64 Clock Mode
Tx 5 Bits (or less)/Character
Tx 7 Bits/Character
Tx 6 Bits/Character
Tx 8 Bits/Character
DTR
Rx 5 Bits/Character
Rx 7 Bits/Character
Rx 6 Bits/Character
Rx 8 Bits/Character
SYNC
7
SYNC
1
SYNC
7
SYNC
3
ADR
7
ADR
7
SYNC
6
SYNC
0
SYNC
6
SYNC
2
ADR
6
ADR
6
SYNC
5
SYNC
5
SYNC
5
SYNC
1
ADR
5
ADR
5
SYNC
4
SYNC
4
SYNC
4
SYNC
0
ADR
4
ADR
4
SYNC
3
SYNC
3
SYNC
3
1
ADR
3
1
SYNC
2
SYNC
2
SYNC
2
1
ADR
2
1
SYNC
1
SYNC
1
SYNC
1
1
ADR
1
1
SYNC
0
SYNC
0
SYNC
0
1
ADR
0
1
Monosync 8 Bits
Monosync 8 Bits
Bisync 16 Bits
Bisync 12 Bits
SDLC
SDLC (Address 0)
Figure 9. Write Register Bit Functions (continued)
10216F-13