參數(shù)資料
型號: AM79C98PC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Twisted-Pair Ethernet Transceiver (TPEX)
中文描述: DATACOM, ETHERNET TRANSCEIVER, PDIP24
封裝: SLIM, PLASTIC, DIP-24
文件頁數(shù): 16/22頁
文件大?。?/td> 213K
代理商: AM79C98PC
AMD
16
Am79C98
SWITCHING CHARACTERISTICS over COMMERCIAL
Parameter
Symbol
Transmit Timing
t
PWODO
Parameter Description
Min
Max
Unit
DO Pulse Width
Accept/Reject Threshold
|V
IN
| > |V
ASQ
|
(Note 3)
15
35
ns
t
PWKDO
DO Pulse Width
Maintain/Turn-Off Threshold
|V
IN
| > |V
ASQ
|
(Note 4)
105
200
ns
t
TON
Transmit Start Up Delay
300
ns
t
TSD
Transmit Static Propagation
Delay (DO to TXD)
120
ns
t
DODION
DO to DI Startup Delay
300
ns
t
DODISD
DO to DI Static Propagation
Delay
100
ns
t
TETD
Transmit End of Transmission
250
450
ns
t
TR
Transmitter Rise Time
(10% to 90%)
10
ns
t
TF
Transmitter Fall Time
(90% to 10%)
10
ns
t
TM
Transmitter Rise and Fall
Time Mismatch
4
ns
t
THD
DO L–>H to TXD+ L–>H
and TXD- H->L Delay
Steady State
(Note 1)
t
TSD
– 1.0
t
TSD
+ 1.0
ns
t
TLD
DO H–>L to TXD+ H–>L
and TXD– L–>H Delay
Steady State
(Note 1)
t
TSD
– 1.0
t
TSD
+ 1.0
ns
t
THDP
DO L–>H to TXP+ H–>L
and TXP- L->H Delay
Steady State
(Note 1)
t
TSD
+ 40
t
TSD
+ 60
ns
t
TLDP
DO H–>L to TXP+ L–>H
and TXP– H->L Delay
Steady State
(Note 1)
t
TSD
+ 40
t
TSD
+ 60
ns
t
XMTON
XMT Asserted Delay
100
ns
t
XMTOFF
XMT De-asserted Delay
300
ns
t
PERLP
Idle Signal Period
8
24
ms
t
PWLP
Idle Link Test Pulse Width
(Note 1)
75
120
ns
t
PWPLP
Predistortion Idle Link Test
Pulse Width
(Note 1)
40
60
ns
t
JA
Transmit Jabber
Activation Time
20
150
ms
t
JR
Transmit Jabber
Reset Time
250
750
ms
t
JREC
Transmit Jabber
Recovery Time (Minimum time
gap between transmitted
packets to prevent jabber
activation)
1.0
μ
s
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