參數(shù)資料
型號(hào)： AM79C985KCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： enhanced Integrated Multiport Repeater Plus (eIMR+⑩)
中文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 16/48頁(yè)
文件大?。?/td> 260K
代理商： AM79C985KCW
16
Am79C985
P R E L I M I N A R Y
indicated when the port is simultaneously attempting to
transmit and receive.
Once a network port is partitioned, the eIMR+ device
will reconnect that port, according to the selected re-
connection algorithm, as follows:
1. Standard reconnection algorithm—A data packet
longer than 512-bit times (nominal) is transmitted or
received by the partitioned port without a collision.
2. Alternative reconnection algorithm—A data packet
longer than 512-bit times (nominal) is transmitted by
the partitioned port without a collision.
A partitioned port can also be reconnected by disabling
and re-enabling the port.
All TP ports use the same reconnection algorithm; ei-
ther they must all use the standard algorithm, or they
must all use the alternative reconnection algorithm.
However, the reconnection algorithm for the AUI port is
programmed independently from that of the TP ports.
Detailed Functions
Reset
The eIMR+ device enters the reset state when the
reset (RST) pin is driven LOW. After the initial applica-
tion of power, the RST pin must be held LOW for a min-
imum of 150
μ
s. If the RST pin is subsequently
asserted while power is maintained to the eIMR+ de-
vice, a reset duration of only 4
μ
s is required. This al-
lows the eIMR+ device to reset its internal logic. During
reset, the eIMR+ registers are set to their default val-
ues. Also during reset, the eIMR+ device sets the out-
put signals to their inactive state; that is, all analog
outputs are placed in their idle state, no bidirectional
signals are driven, all active-HIGH signals are driven
LOW and all active-LOW signals are driven HIGH. In a
multiple eIMR+ system, the reset signal must be syn-
chronized to CLK. See Figure 13 in the Systems Appli-
cationssection.
The eIMR+ device also monitors the state of the
SELI
0-1
, SI, CRS_I, SI_D, and AMODE pins on the ris-
ing (trailing) edge of RST to configure the operating
mode of the device.
Table 1 summarizes the state of the eIMR+ chip follow-
ing reset.
AUI Port
The AUI Port is fully compatible with the IEEE 802.3,
Section 7 requirement for an AUI port. It has the signals
associated with an AUI port: DO, DI, and CI.
The AUI port has two modes of operation: normal and
reverse. When configured for normal operation, the
functionality is that of an AUI port on a MAC (CI is an
input). When configured for reverse operation, the func-
tionality is that of an AUI on a MAU (CI is an output).
The mode of the AUI port is set during the trailing (ris-
ing) edge of the reset pulse, by the state of the AMODE
pin. A LOW sets the AUI port to its normal mode (CI In-
put) and a HIGH sets the AUI port to its reverse (CI Out-
put) mode.
The eIMR+ device can be connected directly to a MAC
through the AUI port. This requires that the AUI port be
configured for reverse operation. Refer to the Systems
Applicationssection for more details.
TP Port Interface
Twisted Pair Transmitters
TXD is a differential twisted-pair driver. When properly
terminated, TXD will meet the electrical requirements
for 10BASE-T transmitters as specified in IEEE 802.3,
Section 14.3.1.2.
The TXD signal is filtered on the chip to reduce har-
monic content per IEEE 802.3, Section 14.3.2.1
(10BASE-T). Since filtering is performed in silicon, TXD
can connect directly to a standard transformer, thereby,
eliminating the need for external filtering modules.
Proper termination is shown in the Systems Applica-
tionssection.
Table 1. eIMR+ States after Reset
State after Reset
HIGH
LOW
HIGH
HIGH IMPEDANCE
IDLE
ENABLED
STANDARD ALGORITHM
STANDARD ALGORITHM
ENABLED, TP PORTS IN LINK FAIL
DISABLED IF SI PIN IS HIGH
ENABLED IF SI PIN IS LOW
Function
Active-LOW Outputs
Active-HIGH Outputs
SO Output
DAT, JAM
Transmitters (TP and AUI)
Receivers (TP and AUI)
AUI Partitioning/Reconnection Algorithm
TP Partitioning/Reconnection Algorithm
Link Test Functions for TP Ports
Automatic Receiver Polarity Reversal Function
Pull Up/Pull Down
No
No
No
Either
No
Terminated
N/A
N/A
N/A
N/A
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