
ASLIC/ASLAC Products
9
PIN DESCRIPTIONS
ASLIC Device
Pin Names
Type
Description
AD, BD
Output
A and B Line Drivers. These pins provide the currents to the A and B leads of the sub-
scriber loop.
BAL1
Input
Pre-balance. This pin receives voltages that are added to the VTX output signal. They can
be used to cancel out the metering echo in the transmit path.
BGND
Gnd
Battery Ground.
This pin connects to the ground return for Central Office or talk
battery.
C2
–
C1
Input
ASLIC Device Control. These ternary logic input pins control the operating state of the
ASLIC device.
C5
–
C3
Input
Test Relay Control. These are control inputs for the test relay drivers in the ASLIC device.
A logic Low turns on the relay driver and activates the relay. C3 controls RY1OUT, C4
controls RY2OUT, and C5 controls RY3OUT.
GND
Gnd
Analog and digital ground return for VCC.
HPA, HPB
Capacitor
High-Pass Filter Capacitor Connections. These pins connect to CHP, the external high-
pass filter capacitor that isolates the DC control loop from the voice transmission path.
IDC
Input
DC Loop Control Current. The DC loop current control line from the ASLAC device is con-
nected to this pin. An internal resistance is provided between the IDC pin and RSN. An
external noise filter capacitor should be connected between this pin and VREF.
IDIF
Output
A
–
B Leg Current. The current at this pin is proportional to the difference of the currents
flowing out of the AD pin and into the BD pin of the ASLIC device.
ISUM
Output
A + B Leg Current. The current at this pin is proportional to the absolute value of the sum
of the currents flowing out of the AD pin and into the BD pin of the ASLIC device.
QBAT
Power
Quiet Battery Voltage. The QBAT pin is connected to the substrate.
RINGOUT,
RY1OUT,
RY2OUT,
RY3OUT
Output
Relay Drivers. These are open collector, high current relay driver outputs with emitters
internally connected to BGND. To absorb the inductive pulse from the relay coils, an in-
ternal Zener diode is connected between the collector of each driver and BGND.
RSN
Input
Receive Summing Node. The metallic current (both AC and DC) between AD and BD is
equal to ASLIC device current gain, K1, times the current into this pin. Networks that pro-
gram receive gain and two-wire impedance connect to this node. This input is nominally
at VREF potential.
RSVD
Input
Reserved. This is used during Legerity testing. In the application, this pin must be floating.
SA, SB
Input
A and B Lead Voltage Sense. These pins sense the voltages on the line side of the fuse
resistors at the A and B leads. External sense resistors, RSA and RSB, are required to
protect these pins from lightning or power cross conditions.
TMG
Thermal
Thermal Management. A resistor connected from this pin to VBAT reduces the on-chip
power dissipation by absorbing excess power from the ASLIC device for short-loop con-
ditions.
VBAT
Power
Battery Voltage. This pin supplies battery voltage to the line drivers.
VCC
Power
Power Supply. This is the positive supply for low voltage analog and digital circuits in the
ASLIC device.
VDC
Output
DC Loop VoltageThe voltage on this output is referenced to VREF and is proportional to
the negative absolute value of the DC subscriber loop voltage between A and B. This volt-
age is a fraction (
β
) of the voltage between HPA and HPB. This pin connects to the IAB
pin on the ASLAC device through external resistor RAB. A voltage that is significantly
more positive than VREF on the VDC pin indicates that the ASLIC device is in thermal
shutdown.