參數(shù)資料
型號(hào): AM7996JC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: IEEE 802.3/Ethernet/Cheapernet Transceiver
中文描述: DATACOM, ETHERNET TRANSCEIVER, PQCC20
封裝: PLASTIC, LCC-20
文件頁(yè)數(shù): 4/18頁(yè)
文件大?。?/td> 179K
代理商: AM7996JC
4
Am7996
PIN DESCRIPTION
Attachment Unit Interface (AUI)
Dl+, Dl–
Receive Line Output (Differential Outputs)
This pair is intended to operate into terminated 78
transmission lines. Signals at RXT meeting bandwidth
requirements and carrier sense levels are outputted at
Dl
±
. Signaling at Dl
±
meets requirements of
IEEE 802.3, Rev. D.
Cl+, Cl–
Collision Line Output (Differential Outputs)
This pair is intended to operate into terminated 78
transmission lines. Signal Quality Error (SQE), de-
tected at DO
±
inputs (excessive transmissions) or RXT
input (during a collision), outputs the 10 MHz internal
oscillator signal to the AUI interface. For proper compo-
nent values at COLL OSC, signaling at Cl
quirements of IEEE 802.3, Rev. D.
DO+, DO–
Transmit Input (Differential Inputs)
A pair of internally biased line receivers consisting of a
squelch detect receiver with offset and noise filtering
and a data receiver with zero offset for data signal pro-
cessing. Signals meeting squelch requirements are
waveshaped and output at TXT.
Coaxial Media Interface (TAP)
RXT
Media Signal Receiver Input (Input)
RXT connects to the media through a 4:1 attenuator of
100 k
total resistance (25 k
Return for the attenuator is V
input with internal AC coupling for Manchester data sig-
nals and direct coupling for Carrier Detect and SQE av-
erage level detection. Signals at RXT meeting carrier
squelch enable data to the Dl
are AC coupled to Dl
±
with a 150 ns time constant,
high-pass filter. Signals meeting SQE levels enable
COLL OSC frequency to Cl
TXT
Tap Node Driver (Input/Output)
A controlled bandwidth current source and sense am-
plifier. This l/O port is to be connected to the media
through an isolation network and a low-pass filter. Sig-
nals meeting DO
±
squelch and jabber timing require-
ments are output at TXT as a controlled rise and fall
time current pulse. When operated into a double termi-
nated 50
transmission line, signaling meets
IEEE 802.3, Rev. D recommendations for amplitude,
pulse-width distortion, rise and fall times, and harmonic
content. The sense amplifier monitors TXT faults and
inhibits transmission.
±
meets re-
and 75 k
. RXT is an analog
in series).
COL
±
outputs. Data signals
±
outputs.
Global Signals
VC
REF
Timing Reference Set (Input)
VC
REF
is a compensated voltage reference input with
respect to V
EE
. When a resistor is connected between
VC
REF
and V
EE
, then internal transmit and receive
squelch timing, SQE oscillator frequency, and receive
and SQE output drive levels are set. SQE frequency
set is also determined by components connected be-
tween V
CC1
and COLL OSC.
SQE TEST
Signal Quality Error Test Enable (Input)
The SQE Test function is enabled by connecting the
SQE TEST pin to V
EE
and disabled by connecting to V
V
TX+
, V
TX–
Tap Node Driver Current Set (Inputs)
A reference input for transmission level and external re-
dundant jabber. Transmit level is set by an external re-
sistor between V
TX+
and V
TX–
R = 9.09
). V
TX–
may be operated between V
V
EE
+ 1 V. When the voltage at V
than V
EE
+ 2 V, TXT is disabled and an SQE message
is output at the Cl pair.
TAP SHIELD
Low-Noise Media Cable Return (Input)
This input is the return for V
ceive signal from the media. External connection is to
a positive power supply.
V
COL
SQE Reference Voltage (Bias Supply)
SQE sense voltage and RXT input amplifier reference.
An internally set analog reference for SQE level and data
signal set at –1.600 V nominal with a source resistance
of 150
nominal. This reference should be filtered with
respect to TAP SHIELD (see Applications section for ad-
justing threshold levels for other applications).
COLL OSC
SQE Timing Set (Input)
Timing input for SQE oscillator. For a properly set input
at VC
REF
, SQE oscillator period is set at 2.1RC. For a
10 MHz SQE oscillator frequency, R should be 1 k
C 47 pF, including interconnect and device capacitance.
V
CC1
Positive Logic Supply
V
CC2
SQE Timing Reference (Positive Supply Voltage)
Timing reference return for SQE oscillator and analog
signal ground.
V
EE
Negative Logic Supply and IC Substrate
CC
.
(for an 80 mA peak level,
EE
and
TX–
goes more positive
COL
reference and the re-
and
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