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參數(shù)資料
| 型號： | AM7968-125DC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| 中文描述： | LINE DRIVER, CDIP28 |
| 封裝： | CERAMIC, DIP-28 |
| 文件頁數(shù)： | 69/127頁 |
| 文件大小： | 730K |
| 代理商： | AM7968-125DC |
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AMD
65
TAXIchip Integrated Circuits Technical Manual
as baseline wander effect and is illustrated in Figure 5-5. In Figure 5-5a, the average DC
fluctuates between 40% and 60% of the maximum level (+10% of midpoint). After the
signal is capacitively coupled (Figure 5-5b), the average DC component is lost due to
high-pass filtering, causing an undesired shift in the signal levels. This shift in the signal
levels, coupled with non-zero rise and fall times of the serial stream cause pulse width
distortion and thus apparent jitter and possible increased error rates.
This DC shifting effect can be minimized if the values of the AC coupling components
are chosen appropriately. The DC level of the data will fluctuate at a data-dependent
frequency, f
b
, called the baseline wander frequency. The 3 dB corner frequency of the
AC coupling, f
3dB
=1/(2
π
RC), should be chosen below the minimum baseline wander
frequency of the data. This allows most DC variations to pass through the AC coupling
high-pass filtering, minimizing the DC shift in the signal.
To minimize f
3dB
we must maximize R and C. The resistance R is generally determined
either by the termination required by the transmission line or by biasing requirements on
both sides of the link. Hence, only the coupling capacitor C can be maximized to keep
f
3dB
as low as possible. The largest value capacitor that can be used is limited by the fact
that it must be an RF capacitor. RF capacitors are generally of the ceramic type (NPO
and X7R dielectrics) and are limited to a maximum value of approximately 1.0
μ
F.
0.1
μ
F capacitors have proven to be sufficient in laboratory tests of TAXIchip set
systems.
For a 0.1
μ
F capacitor, we must verify that the capacitive reactance at the lowest
fundamental frequency possible is less than 1
. The lowest fundamental frequency
possible is the frequency that results when the TAXIchip set is running at it’s lowest
BAUD rate (40 Mbaud) and the command or data pattern with the least number of
transitions is being sent. This pattern turns out to be the HQ command (FDDI terminol-
ogy) which has only 1 transition per command, or 1 transition per 10 bits when the
command is encoded. If a continuous stream of HQ commands are sent at 40 Mbaud,
the resultant fundamental frequency of the signal is 2 MHz. At 2 MHz, the capacitive
reactance of a 0.1
μ
F capacitor is calculated as follows:
XC =
=
2
π
fC
2
π
(2*10
6
) (0.1*10
-6
)
1
1
0.8
=
Hence, in the worst case a 0.1
μ
F capacitor will give a reactance of less than 1
, as
desired.
In summary, the largest value RF capacitor available should be used to optimize the
Figure 5-5
Baseline Wander
12330E-12
Average DC Level Varies
with Data Pattern
a) Data Before AC Coupling
Varying DC is Filtered Out
Causing an Undesired DC
Shift in the Data
b) Data After AC Coupling
相關PDF資料 |
PDF描述 |
|---|---|
| Am7968-125DMC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125JC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7968-125LMC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-175DC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7968-175DMC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM7968-125DCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-125DE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-125DEB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-125DKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125DMC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
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