參數(shù)資料
型號： AM70PDL129BDH
廠商： Spansion Inc.
英文描述： 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
中文描述： 2 × 64兆位（8米× 16位）的CMOS 3.0伏特，只有頁面模式閃存數(shù)據(jù)存儲128兆位（8米× 16位）的CMOS
文件頁數(shù)： 74/128頁
文件大小： 918K
代理商： AM70PDL129BDH
72
Am70PDL127BDH/Am70PDL129BDH
November 25, 2003
A D V A N C E I N F O R M A T I O N
pSRAM AC CHARACTERISTICS
Read Cycle
Notes:
1. t
OD,
t
ODo
, t
BD
, and t
ODW
are defined as the time at which
the outputs achieve the open circuit condition and are not
referenced to output voltage levels.
2. If CE#f1, LB#, or UB# goes low at the same time or before
WE# goes high, the outputs will remain at high impedance.
3. If CE#f1, LB#, or UB# goes low at the same time or after
WE# goes low, the outputs will remain at high impedance.
Figure 23.
Psuedo SRAM Read Cycle
Parameter
Symbol
Description
Speed
Unit
66
85
t
RC
t
ACC
t
CO
t
OE
t
BA
t
COE
t
OEE
t
BE
t
OD
t
ODO
t
BD
t
OH
t
PM
t
PC
t
AA
t
AOH
Read Cycle Time
Min
70
85
ns
Address Access Time
Max
70
85
ns
Chip Enable Access Time
Max
70
85
ns
Output Enable Access Time
Max
25
ns
Data Byte Control Access Time
Max
25
ns
Chip Enable Low to Output Active
Min
10
ns
Output Enable Low to Output Active
Min
0
ns
Data Byte Control Low to Output Active
Min
0
ns
Chip Enable High to Output High-Z
Max
20
ns
Output Enable High to Output High-Z
Max
20
ns
Data Byte Control High to Output High-Z
Max
20
ns
Output Data Hold from Address Change
Min
10
ns
Page Mode Time
Min
70
ns
Page Mode Cycle Time
Min
30
ns
Page Mode Address Access Time
Max
30
ns
Page Output Data Hold Time
Min
10
ns
t
RC
t
ACC
Addresses
A20 to A0
CE#1s
CE2s
OE#
WE#
LB#, UB#
D
OUT
DQ15 to DQ0
t
CO
t
OH
Fixed High
High-Z
High-Z
t
OE
t
BA
t
OD
t
ODO
t
BD
Valid Data Out
Indeterminate
t
BE
t
OEE
t
COE
相關(guān)PDF資料
PDF描述
AM70PDL129BDH66IS 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
AM70PDL129BDH66IT 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
AM70PDL129BDH85IS 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
AM70PDL129BDH85IT 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
AM70PDL127CDH Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM70PDL129BDH66I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
AM70PDL129BDH66IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
AM70PDL129BDH66IT 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
AM70PDL129BDH85I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
AM70PDL129BDH85IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
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