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參數(shù)資料
| 型號： | AM49DL640AG70IS |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 存儲器 |
| 英文描述： | Circular Connector; No. of Contacts:32; Series:MS27468; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:19; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:19-32 RoHS Compliant: No |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA73 |
| 封裝： | 8 X 11.60 MM, FBGA-73 |
| 文件頁數(shù)： | 54/65頁 |
| 文件大?。?/td> | 1005K |
| 代理商： | AM49DL640AG70IS |
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April 1, 2003
Am49DL640AG
53
P R E L I M I N A R Y
pSRAM AC CHARACTERISTICS
Power Up Time
When powering up the SRAM, maintain V
CC
s for 100 μs minimum with CE#1s at V
IH
.
Read Cycle
Notes:
1. CE1#s = OE# = V
IL
, CE2s = WE# = V
IH
, UB#s and/or LB#s = V
IL
2. Do not access device with cycle timing shorter than t
RC
for continuous periods < 10 μs.
Figure 29.
pSRAM Read Cycle—Address Controlled
Parameter
Symbol
Description
Speed
Unit
70
55
t
RC
Read Cycle Time
Min
70
55
ns
t
AA
Address Access Time
Max
70
55
ns
t
CO1
, t
CO2
Chip Enable to Output
Max
70
55
ns
t
OE
Output Enable Access Time
Max
35
25
ns
t
BA
LB#s, UB#s to Access Time
Max
70
55
ns
t
LZ1
, t
LZ2
Chip Enable (CE1#s Low and CE2s High) to Low-Z
Output
Min
10
ns
t
BLZ
UB#, LB# Enable to Low-Z Output
Min
10
ns
t
OLZ
Output Enable to Low-Z Output
Min
5
ns
t
HZ1
, t
HZ2
Chip Disable to High-Z Output
Max
25
ns
t
BHZ
UB#s, LB#s Disable to High-Z Output
Max
25
ns
t
OHZ
Output Disable to High-Z Output
Max
25
ns
t
OH
Output Data Hold from Address Change
Min
10
ns
Address
Data Out
Previous Data Valid
Data Valid
t
AA
t
RC
t
OH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM49DL640BG70IS | PV SERIES |
| AM49DL640BG70IT | PV SERIES |
| AM49DL640BG | ECONOLINE: REC3-S_DRW(Z)/H4,H6 - Safety standards and approval: EN 60950 certified, rated for 250VAV (LVD test report)- Applied for Ul 1950 Component Recognised Certification- 3W DIP Package- 4kVDC & 6kVDC Isolation- Regulated Output- Continuous Short Circiut Protection Auto-Restarting |
| AM49DL640BG30IT | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM49DL640BG35IS | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM49DL640AG70IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM49DL640AG85IS | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM49DL640AG85IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM49DL640AH | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Pseudo Static RAM |
| AM49DL640AH56IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Pseudo Static RAM |
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