參數(shù)資料
型號(hào)： AM486DE2-66V8TGC
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： 8-Kbyte Write-Through Embedded Microprocessor
中文描述： 32-BIT, 66 MHz, MICROPROCESSOR, CPGA168
封裝： CERAMIC, PGA-168
文件頁(yè)數(shù)： 6/52頁(yè)
文件大?。?/td> 1094K
代理商： AM486DE2-66V8TGC
6
Am486DE2 Microprocessor
FIGURES
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10 Auto Halt Restart Register Offset.............................................................................................30
Figure 11 I/O Instruction Restart Register Offset .....................................................................................30
Figure 12 SMM Base Slot Offset..............................................................................................................31
Figure 13 SRAM Usage ...........................................................................................................................31
Figure 14 SMRAM Location .....................................................................................................................32
Figure 15 SMM Timing in Systems Using Non-Overlaid Memory Space and Write-Through Mode with
Caching Enabled During SMM.................................................................................................32
Figure 16 SMM Timing in Systems Using Overlaid Memory Space and Write-Through Mode with
Caching EnabledDuring SMM.................................................................................................33
Figure 17 SMM Timing in Systems Using Overlaid Memory Space and Write-Through Mode with
Caching DisabledDuring SMM................................................................................................33
Figure 18 CLK Waveforms.......................................................................................................................43
Figure 19 Output Valid Delay Timing .......................................................................................................44
Figure 20 Maximum Float Delay Timing...................................................................................................44
Figure 21 PCHK Valid Delay Timing ........................................................................................................45
Figure 22 Input Setup and Hold Timing....................................................................................................46
Figure 23 RDY and BRDY Input Setup and Hold Timing.........................................................................47
Figure 24 TCK Waveforms.......................................................................................................................47
Figure 25 Test Signal Timing Diagram.....................................................................................................48
Figure 26 Heat Sink Dimensions..............................................................................................................49
Entering Stop Grant State........................................................................................................19
Stop Clock State Machine........................................................................................................21
Recognition of Inputs when Exiting Stop Grant State ..............................................................21
Basic SMI Interrupt Service......................................................................................................23
Basic SMI Hardware Interface .................................................................................................23
SMI Timing for Servicing an I/O Trap.......................................................................................24
SMIACT Timing........................................................................................................................25
Redirecting System Memory Address to SMRAM ...................................................................25
Transition to and from SMM.....................................................................................................27
TABLES
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
EADS Sample Time .................................................................................................................13
Pin State During Stop Grant Bus State....................................................................................19
SMRAM State Save Map .........................................................................................................26
SMM Initial CPU Core Register Settings..................................................................................28
Segment Register Initial States................................................................................................28
System Management Mode Revision Identifier........................................................................29
SMM Revision Identifier Bit Definitions ....................................................................................29
Auto Halt Restart Configuration ...............................................................................................30
I/O Trap Word Configuration....................................................................................................30
Test Register (TR4)..................................................................................................................36
Test Register (TR5)..................................................................................................................36
Am486DE2 Microprocessor Functional Differences ................................................................37
CPU ID Codes..........................................................................................................................37
CPUID Instruction Description .................................................................................................38
Thermal Resistance (°C/W)
θ
JC
and
θ
JA
for the Am486DE2 in 168-Pin PGA Package ..........49
Maximum T
A
at Various Airflows in
°
C.....................................................................................49
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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