參數(shù)資料
型號(hào): AM29LV641GH70EI
廠商: Advanced Micro Devices, Inc.
英文描述: 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
中文描述: 64兆位(4個(gè)M x 16位)的CMOS 3.0伏特,只有統(tǒng)一閃存部門與VersatileI /輸出⑩控制
文件頁數(shù): 51/55頁
文件大?。?/td> 719K
代理商: AM29LV641GH70EI
June 14, 2005
Am29LV641G
52
A D V A N C E I N F O R M A T I O N
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1.
Typical program and erase times assume the following conditions: 25
°
C, 3.0 V V
CC
, 1,000,000 cycles. Additionally, programming typicals
assume checkerboard pattern.
Under worst case conditions of 90
°
C, V
CC
= 3.0 V, 1,000,000 cycles.
The typical chip programming time is considerably less than the maximum chip programming time listed, since most words program faster than
the maximum program times listed.
In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 10 for further
information on command definitions.
The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
2.
3.
4.
5.
6.
LATCHUP CHARACTERISTICS
Note:
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
TSOP & FBGA PIN CAPACITANCE
Notes:
1.
2.
Sampled, not 100% tested.
Test conditions T
A
= 25°C, f = 1.0 MHz.
DATA RETENTION
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
0.6
4
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
50
sec
Word Program Time
7
210
μs
Excludes system level
overhead (Note 5)
Accelerated Word Program Time
4
120
μs
Chip Program Time (Note 3)
18
54
sec
Description
Min
Max
Input voltage with respect to V
SS
on all pins except I/O pins
(including A9, OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to V
SS
on all I/O pins
–1.0 V
V
CC
+ 1.0 V
V
CC
Current
–100 mA
+100 mA
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
TSOP
6
7.5
Fine-pitch
BGA
4.2
5.0
C
OUT
Output Capacitance
V
OUT
= 0
TSOP
8.5
12
Fine-pitch
BGA
5.4
6.5
C
IN2
Control Pin Capacitance
V
IN
= 0
TSOP
7.5
9
Fine-pitch
BGA
3.9
4.7
Parameter Description
Test Conditions
Min
Unit
Minimum Pattern Data Retention Time
150
°
C
10
Years
125
°
C
20
Years
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