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    參數(shù)資料
    型號(hào): AM29LV640MH
    廠商: Advanced Micro Devices, Inc.
    英文描述: 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
    中文描述: 64兆位(4個(gè)M x 16位/八米× 8位)的MirrorBit⑩3.0伏特,只有統(tǒng)一閃存部門與VersatileI /輸出⑩控制
    文件頁數(shù): 49/62頁
    文件大?。?/td> 602K
    代理商: AM29LV640MH
    December 14, 2005
    Am29LV640MH/L
    47
    D A T A S H E E T
    AC CHARACTERISTICS
    Erase and Program Operations
    Notes:
    1.
    2.
    Not 100% tested.
    See the “Erase and Programming Performance” section for more
    information.
    For 1–16 words/1–32 bytes programmed.
    Effective write buffer specification is based upon a
    16-word/32-byte write buffer operation.
    Word/Byte programming specification is based upon a single
    word/byte programming operation not utilizing the write buffer.
    3.
    4.
    5.
    6.
    AC Specifications listed are tested with V
    IO
    = V
    CC
    . Contact AMD
    for information on AC operation with V
    IO
    V
    CC
    .
    When using the program suspend/resume feature, if the
    suspend command is issued within t
    , t
    must be fully
    re-applied upon resuming the programming operation. If the
    suspend command is issued after t
    , t
    is not required
    again prior to reading the status bits upon resuming.
    7.
    Parameter
    Speed Options
    JEDEC
    Std.
    Description
    90R
    101,
    101R
    112,
    112R
    120,
    120R
    Unit
    t
    AVAV
    t
    AVWL
    t
    WC
    t
    AS
    Write Cycle Time (Note 1)
    Min
    90
    100
    110
    120
    ns
    Address Setup Time
    Min
    0
    ns
    t
    ASO
    Address Setup Time to OE# low during toggle bit
    polling
    Min
    15
    ns
    t
    WLAX
    t
    AH
    Address Hold Time
    Min
    45
    ns
    t
    AHT
    Address Hold Time From CE# or OE# high
    during toggle bit polling
    Min
    0
    ns
    t
    DVWH
    t
    WHDX
    t
    DS
    t
    DH
    t
    OEPH
    Data Setup Time
    Min
    45
    ns
    Data Hold Time
    Min
    0
    ns
    Output Enable High during toggle bit polling
    Min
    20
    ns
    t
    GHWL
    t
    GHWL
    Read Recovery Time Before Write
    (OE# High to WE# Low)
    Min
    0
    ns
    t
    ELWL
    t
    WHEH
    t
    WLWH
    t
    WHDL
    t
    CS
    t
    CH
    t
    WP
    t
    WPH
    CE# Setup Time
    Min
    0
    ns
    CE# Hold Time
    Min
    0
    ns
    Write Pulse Width
    Min
    35
    ns
    Write Pulse Width High
    Min
    30
    ns
    t
    WHWH1
    t
    WHWH1
    Write Buffer Program Operation (Notes 2, 3)
    Typ
    352
    μs
    Effective Write Buffer Program
    Operation (Notes 2, 4)
    Per Byte
    Typ
    11
    μs
    Per Word
    Typ
    22
    μs
    Accelerated Effective Write Buffer
    Program Operation (Notes 2, 4)
    Per Byte
    Typ
    8.8
    μs
    Per Word
    Typ
    17.6
    μs
    Single Word/Byte Program
    Operation (Note 2, 5)
    Byte
    Typ
    100
    μs
    Word
    100
    μs
    Single Word/Byte Accelerated
    Programming Operation (Note 2, 5)
    Byte
    Typ
    90
    μs
    Word
    90
    μs
    t
    WHWH2
    t
    WHWH2
    t
    VHH
    t
    VCS
    t
    BUSY
    t
    POLL
    Sector Erase Operation (Note 2)
    Typ
    0.5
    sec
    V
    HH
    Rise and Fall Time (Note 1)
    V
    CC
    Setup Time (Note 1)
    WE# High to RY/BY# Low
    Min
    250
    ns
    Min
    50
    μs
    Min
    90
    100
    110
    120
    ns
    Program Valid Before Status Polling (Note 7)
    Max
    4
    μs
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