參數(shù)資料
型號: AM29LV017B-120EE
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: CAT 5E PATCH CORD, GREEN 1 FT
中文描述: 2M X 8 FLASH 3V PROM, 120 ns, PDSO40
封裝: TSOP-40
文件頁數(shù): 12/39頁
文件大?。?/td> 510K
代理商: AM29LV017B-120EE
Am29LV017B
12
P R E L IM IN A R Y
Figure 2.
Temporary Sector Unprotect Operation
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Table 8 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
CC
power-up
and power-down transitions, or from system noise.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not ac-
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the
proper signals to the control pins to prevent uninten-
tional writes when V
CC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE#
= V
IL
, CE# = V
IH
or WE# = V
IH
. To initiate a write cy-
cle, CE# and WE# must be a logical zero while OE#
is a logical one.
Power-Up Write Inhibit
If WE# = CE# = V
IL
and OE# = V
IH
during power
up, the device does not accept commands on the
rising edge of WE#. The internal state machine is
automatically reset to reading array data on
power-up.
START
Perform Erase or
Program Operations
RESET# = V
IH
Temporary Sector
Unprotect Completed
(Note 2)
RESET# = V
ID
(Note 1)
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once
again.
21415C-5
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PDF描述
Am29LV017B-120EEB CAT5E PATCH CORD ,GREEN
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