參數(shù)資料
型號(hào): AM29F400BT-90DPE2
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 2
中文描述: 256K X 16 FLASH 5V PROM, 90 ns, UUC43
封裝: DIE-43
文件頁數(shù): 11/12頁
文件大?。?/td> 126K
代理商: AM29F400BT-90DPE2
10
Am29F400B Known Good Die
S U P P L E M E N T
REVISION SUMMARY
Revision A (May 1997)
Initial release.
Revision B (January 1998)
Formatted to match current template. Updated Distinc-
tive Characteristics and General Description sections
using the current main data sheet. Updated for CS39
process technology.
Revision B+1 (February 1998)
Distinctive Characteristics
The minimum guarantee per sector is now 1 million cycles.
Global
Added -75 and -90 speed options.
Pad Description
Corrected coordinates for pads 2, 19, 22, 35, 40, and 42.
Physical Specifications
Changed die thickness specification to ~20 mils.
Revision B+2 (May 1998)
Die Pad Locations
Moved AMD logo to above pad 23.
Revision C (June 1998)
Distinctive Characteristics
Changed
“Manufactured on 0.35 μm process technology”
to “Manufactured on 0.32 μm process technology”.
General Description
Third paragraph:
Changed “AMD’s 0.35 μm process
technology” to “AMD’s 0.32 μm process technology”.
Die Photograph
Replaced with photograph of Die Revision 2.
Die Pad Locations
Corrected the location of the AMD logo to above pad 22
from pad above pad 13. Modified figure to match new
die photograph.
Pad Description
Replaced table with new pad coordinates.
Physical Specifications
Die Dimensions:
Changed to 135 mils x 198 mils, 3.43
mm x 5.03 mm from 141.34 mils x 207.48 mils, 3.59
mm x 5.27 mm.
Die Thickness:
Added ~500 μm.
Pad Area Free of Passivation:
Changed to 20.85 mils
2
and 13,433 μm
2
from 15.52 mils
2
and 10,000 μm
2
.
Passivation:
Changed to SiN/SOG/SiN from Nitride/
SOG/Nitride.
Manufacturing Information
Manufacturing ID:
Changed to 98F02AK (top boot) and
98F02ABK (bottom boot) from 98965AK (top boot) and
98965ABK (bottom boot).
Fabrication Process:
Changed to CS39S from CS39.
Die Revision:
Changed to 2 from 1.
Revision C+1 (September 1998)
Page 5,
Ordering Information
Package Type and Minimum Order Quantity
: Changed
Waffle Pack to 140 die per 5 tray stack from 180 die per
5 tray stack. Changed Gel-Pak
Die Tray to 594 die per
6 tray stack from 378 die per 6 tray stack. Changed Sur-
ftape (Tape and Reel) to 2500 per 7-inch reel from
1800 per 7-inch reel.
Page 7,
Physical Specifications
Die Dimensions
: Changed to 3.42 mm x 5.02 mm from
3.43 mm x 5.03 mm.
Bond Pad Size:
Changed to 4.7 mils x 4.7 mils and
119.7 μm x 119.7 μm from 3.74 mils x 3.74 mils and
95 μm x 95 μm.
Pad Area Free of Passivation:
Changed to 13.98 mils
2
and 9,025 μm
2
from 20.85 mils
2
and 13,433 μm
2
.
Bond Pad Metallization
: Changed to Al/Cu from Al/Cu/Si.
Page 7, Manufacturing Information
Manufacturing ID (Top Boot)
: Changed to 98F02AK
from 98F02A.
Revision D (November 1998)
Global
Revised document specifications for die shrink from
0.35 μm to 0.32 μm process technology.
Terms and Conditions
Replaced warranty with new version.
Revision E (December 1998)
Packaging Information
Added section. Moved orientation information from die
photograph section into this section.
Revision E+1 (February 1999)
Die Pad Locations
Corrected top row of pad callouts.
Revision E+2 (June 14, 1999)
Physical Specifications
Corrected the bond pad dimensions.
相關(guān)PDF資料
PDF描述
AM29F400BT-90DPI2 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 2
AM29F400BT-90DTC2 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 2
AM29F400BT-90DTE2 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 2
AM29F400BT-90DTI2 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 2
AM29F400BT-90DWC2 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 2
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參數(shù)描述
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