參數(shù)資料
型號(hào)： Am29F400BT-60FEB
廠商： Advanced Micro Devices, Inc.
元件分類： DC/DC變換器
英文描述： RP12 (AW) Series - Powerline Regulated DC-DC Converters; Input Voltage (Vdc): 24V; Output Voltage (Vdc): 15V; 4:1 Wide Input Voltage Range; 12 Watts Regulated Output Power; 1.6kVDC Isolation; Over Current and Over Voltage Protection; Five-Sided Shield; No Derating to 61??C; Standard DIP24 Pinning; Efficiency to 88%
中文描述： 4兆位（512畝x 8-Bit/256畝x 16位），5.0伏的CMOS只引導(dǎo)扇區(qū)閃存
文件頁(yè)數(shù)： 12/37頁(yè)
文件大?。?/td> 515K
代理商： AM29F400BT-60FEB
12
Am29F400B
P R E L IM IN A R Y
number of times, without initiating another command
sequence.
A read cycle at address XX00h or retrieves the manu-
facturer code. A read cycle at address XX01h in word
mode (or 02h in byte mode) returns the device code.
A read cycle containing a sector address (SA) and the
address 02h in word mode (or 04h in byte mode) re-
turns 01h if that sector is protected, or 00h if it is un-
protected. Refer to Tables 2 and 3 for valid sector
addresses.
The system must write the reset command to exit the
autoselect mode and return to reading array data.
Word/Byte Program Command Sequence
The system may program the device by word or byte,
depending on the state of the BYTE# pin. Program-
ming is a four-bus-cycle operation. The program com-
mand sequence is initiated by writing two unlock write
cycles, followed by the program set-up command. The
program address and data are written next, which in
turn initiate the Embedded Program algorithm. The
system is not required to provide further controls or tim-
ings. The device automatically provides internally gen-
erated program pulses and verify the programmed cell
margin. Table 5 shows the address and data require-
ments for the byte program command sequence.
When the Embedded Program algorithm is complete,
the device then returns to reading array data and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using DQ7,
DQ6, or RY/BY#. See “Write Operation Status” for in-
formation on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored. Note that a
hardware reset
immediately terminates the program-
ming operation. The Byte Program command se-
quence should be reinitiated once the device has reset
to reading array data, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from a “0” back to a “1”.
Attempting to do so may halt
the operation and set DQ5 to “1”, or cause the Data#
Polling algorithm to indicate the operation was suc-
cessful. However, a succeeding read will show that the
data is still “0”. Only erase operations can convert a “0”
to a “1”.
Note:
See Table 5 for program command sequence.
Figure 2.
Program Operation
Chip Erase Command Sequence
Chip erase is a six-bus-cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does
not
require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Table 5 shows
the address and data requirements for the chip erase
command sequence.
Any commands written to the chip during the Embed-
ded Erase algorithm are ignored. Note that a
hardware
reset
during the chip erase operation immediately ter-
minates the operation. The Chip Erase command se-
quence should be reinitiated once the device has
returned to reading array data, to ensure data integrity.
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
21505C-6
相關(guān)PDF資料
PDF描述
AM29F400BT-120EC 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only Boot Sector Flash Memory
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參數(shù)描述
AM29F400BT-70EC 制造商:SOCO 功能描述:
AM29F400BT-70ED 制造商:Spansion 功能描述:FLASH TOP BLOCK 4MB SMD 29F400
AM29F400BT-70EF 功能描述:閃存 4M (512KX8/256Kx16) Parallel NOR Fl 5V RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
AM29F400BT-70EF\\T 制造商:Spansion 功能描述:IC 4MEG FLSH X 16 CMOS TOP SECTOR CS39S
AM29F400BT-70EF\T 功能描述:閃存 IC 4MEG FLSH X 16 CMOS TOP SECTR CS39S RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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